CAD infrastructure for VLSI Design
A centre of excellence (CoE) is a team of skilled knowledge workers whose mission is to provide the organization they work for with best practices around a particular area of interest.
With this vision, the IEEE BIT student branch inaugurated a COE in the field of Electronics Design Automation (EDA).
The inauguration ceremony followed by a 2-day hands on workshop about CAD infrastructure for VLSI on 1st and 2nd of February 2024 marked the magnificent beginning of this journey.
The inauguration ceremony was graced by Vice Principal J.Prakash, HOD Dept. of VDT Dr. Vijaya Prakash, HOD Dept. of ECE Dr. Hemanth Kumar and Dr Jalaja S accompanied by various other distinguished guests. The participants and other students were addressed by them which further enhanced the outcomes of the event.
The speaker for the event Director of Labs and Lectures, Aloke Das unveiled the banner of the COE and marked the start of the event.
After the inauguration, the speaker engaged the students with a brief introduction about the pre requisites to learn CAD.
He informed the participants about the various platforms available as open-source to learn CAD. He also gave information about the specifications of the laptop or computer required.
The workshop was mainly focused on getting the students used to using Linux and OpenLane (an open-source platform for CAD).
Date and Time
Location
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- K R Road
- V V Pura
- Bangalore, Karnataka
- India 560004
- Building: Bangalore Institute of Technology
- Room Number: Seminar Hall
- Contact Event Host
- Co-sponsored by Bangalore Institute of Technology IEEE Students Branch
Speakers
Aloke of Lab and Lectures Semiconductors
CAD for VLSI
Designing a semiconductor is a complex task. After designing, taking it through fabrication is even more complex. In this workshop we will talk about what are the things to design and manufacture a digital circuit. We will talk about the compute infrastructures needed for this. We will talk about the software tools needed. We will talk about hardware description language (HDL) briefly. We will take couple of small designs to demonstrate how things work.
Biography:
Email:
Address:ITPL Main Road, Brookfield, Bangalore, India, 560037
Agenda
Inauguration by College chairman
Inauguration of Centre of Excellence on EDA
Keynote talk by Student Branch Councillor
Two-day hands on workshop on CAD tools for VLSI design
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