Chunfei Yi of Intel - China

Signal integrity (SI) has becomes a critical factor determining the performance of a link and cost of the design for today’s computer system, communication network, and the Internet of Things, etc.. This presentation will cover the importance of SI and typical SI challenges such as loss, crosstalk, impedance discontinuity, and jitter, etc. SI performance improvement and enablers will also be discussed including equalization, interconnect optimization, and crosstalk mitigation. SI modeling, simulation and measurement will be briefly introduced in this presentation as well.

Biography:

Biography

Dr. Chunfei Ye works with Intel Corporation as Senior Staff Engineer, responsible for PCH and SOC CPU SI design for SATA, SAS, USB, and package electrical design for all generations of Intel server platforms from 2005. He is SI team lead and tech lead in the server group.   Chunfei Ye obtained B.Sci. in Mathematics in 1982 from Hangzhou University and Ph.D. in Electrical Engineering in 1994 from Southeast University.   Before joining Intel in 2002, his work experience includes working as Associate Professor with Shanghai Tiedao University China, visiting scholar and instructor with Massachusetts Institute of Technology USA,  and Senior Engineer at Institute of High Performance Computing Singapore.  Chunfei joined Intel China Ltd in 2002 as group manager supporting signal integrity and power integrity for Intel communication products. He joined Intel server group in 2005 supporting server PCH and SOC CPU SI design since then.  Chunfei is the vice chair of IEEE EMC Society Technical Committee 10 (Signal Integrity and Power Integrity). He holds 3 patents and have more than 50 publications in international journals and on conferences.

Email:

Address:China

Chunfei Yi of Intel - China

Biography:

Email:

Address:China