IEEE EDS Distinguished Lecture: 2.5D/3D Integration Technology

#2.5D #integration #3D #TSV #Silicon #wafer #packaging #BEOL #CMOS #process
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IEEE Electron Devices Society-Northern Virginia/Washington DC Chapter is pleased to announce an IEEE EDS Distinguished Lecture Event on Wednesday, September 14, 2016.  Dr. Mukta Farooq, an IEEE EDS Distinguished Lecturer and GlobalFoundries Fellow, will give a technical lecture about 2.5D/3D Integration Technology. In this talk, she will review the various types of 2.5D and 3D integration and explain why they offer significant advantages over conventional methods.

This event is co-sponsored by Nanotechnology Council-Northern Virginia/Washington DC Chapter and the IEEE Women In Engineering Northern Virginia group and it will be hosted at Manassas, Micron Technology Virginia facility.

 



  Date and Time

  Location

  Hosts

  Registration



  • Date: 14 Sep 2016
  • Time: 05:30 PM to 07:15 PM
  • All times are (GMT-05:00) US/Eastern
  • Add_To_Calendar_icon Add Event to Calendar
  • Micron Technology Virginia
  • 9600 Godwin Drive
  • Manassas, Virginia
  • United States 20110
  • Building: Micron Office Building 130
  • Room Number: Classroom 3

  • Contact Event Host
  • Dr. John Zhang

    Chair of IEEE-EDS Northern Virginia/Washington DC chapter

    Email: john.zhang.us@ieee.org, or johnzhang@micron.com

  • Co-sponsored by Nanotechnology Council-Northern Virginia/Washington DC Chapter and the IEEE Women In Engineering Northern Virginia group
  • Starts 18 August 2016 12:00 AM
  • Ends 12 September 2016 11:30 PM
  • All times are (GMT-05:00) US/Eastern
  • No Admission Charge


  Speakers

Mukta Farooq Mukta Farooq of GLOBALFOUNDRIES

Topic:

2.5D/3D Integration Technology

Abstract:


2.5D/3D integration technology encompasses a wide variety of configurations which employ TSVs (Through Silicon/Substrate Vias) in a silicon wafer. 2.5D generally refers to heterogeneous integration of chips using interposers which typically have only passive components: wiring, capacitors and inductors. 3D technology goes beyond the interposer by integrating logic functionality in the assembly. 3D integration has the ability to enhance system performance by increasing bandwidth, reducing wire delay, and enabling better power management. In 3D technology, the TSVs may be integrated into the CMOS transistor fabrication at a number of points in the manufacturing sequence. Key considerations to determine the optimal introduction point include the size of the TSV, dimensional compatibility of the TSV with the BEOL (Back End Of Line) features, and the wiring design requirements. In this talk, we will review the various types of 2.5D and 3D integration, and why they offer significant advantages over conventional methods. We will also discuss the key elements of TSV fabrication including via etching, insulation, metallization, annealing, capping, as well as wafer grindside processing. Finally we will discuss the effects of TSVs on devices and BEOL structures, and the type of reliability testing that is required to evaluate the long-term impact of TSVs.

Biography:

Dr. Mukta Farooq, a GlobalFoundries Fellow, is the technical leader for 7 nm Advanced Silicon Packaging. She is a materials scientist, with expertise in 2.5D/3D integration, die stacking, BEOL, C4/BGA/CGA, lead-free alloys, chip package interaction and intellectual property development. She has led numerous technology programs to successful qualifications, including 3D 32 nm CMOS technology with Cu TSV, 2.5D heterogeneous interposer technology, and lead-free interconnects for CMOS die at multiple nodes. Mukta holds 190 granted patents and was designated Lifetime Master Inventor and Academy of Technology Member at IBM. She has 30 external publications, and has given invited talks and tutorials. Mukta is an IEEE Fellow, EDS (Electron Device Society) Distinguished Lecturer, EDS Governor, Regional Editor - EDS Newsletter, and Chair, EDS Mid-Hudson Chapter. She received her BS from IIT Bombay, MS from Northwestern University, and PhD from Rensselaer Polytechnic Institute.

Email:

Address:GLOBALFOUNDRIES, 2070 Route 52, East Fishkill, New York, United States, 12533

Mukta Farooq of GLOBALFOUNDRIES

Topic:

2.5D/3D Integration Technology

Biography:

Email:

Address:East Fishkill, New York, United States






Agenda

5:30-6:00PM: Refreshments/Networking

6:00-6:10PM: Introduction

6:10-7:00PM: Lecture

7:00-7:15PM: Q&A 

        7:15PM: Adjourn

Note: Registration is required for temporary security badge preparation

 

Directions to Micron:

From I-66 Corridor Exit: VA-234 S on Prince William Pkwy. Ex IEEE Distinguished Lecturerit 44 toward Manassas/Dumfries Left: University Blvd. until you reach first light, go directly through the light End: 9600 Godwin Dr

From I-95 Corridor Exit: VA-234 N Exit 152 toward Manassas Take: 28 N ramp toward Manassas Merge: Nokesville Rd/ VA-28 Left: Godwin Dr. End: 9600 Godwin Dr.

Parking Information: Please follow the “Visitor Parking” signs to designated parking areas. Then proceed to Building 130 (brown in color) and give your name (or group designation) to the receptionist for check-in.