CAD infrastructure for VLSI Design
A centre of excellence (CoE) is a team of skilled knowledge workers whose mission is to provide the organization they work for with best practices around a particular area of interest.
With this vision, the IEEE BIT student branch inaugurated a COE in the field of Electronics Design Automation (EDA).
The inauguration ceremony followed by a 2-day hands on workshop about CAD infrastructure for VLSI on 1st and 2nd of February 2024 marked the magnificent beginning of this journey.
The inauguration ceremony was graced by Vice Principal J.Prakash, HOD Dept. of VDT Dr. Vijaya Prakash, HOD Dept. of ECE Dr. Hemanth Kumar and Dr Jalaja S accompanied by various other distinguished guests. The participants and other students were addressed by them which further enhanced the outcomes of the event.
The speaker for the event Director of Labs and Lectures, Aloke Das unveiled the banner of the COE and marked the start of the event.
After the inauguration, the speaker engaged the students with a brief introduction about the pre requisites to learn CAD.
He informed the participants about the various platforms available as open-source to learn CAD. He also gave information about the specifications of the laptop or computer required.
The workshop was mainly focused on getting the students used to using Linux and OpenLane (an open-source platform for CAD).
Date and Time
Location
Hosts
Registration
- Start time: 01 Feb 2024 10:00 AM
- End time: 02 Feb 2024 05:00 PM
- All times are (UTC+05:30) Chennai
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- Bangalore Institute Of Technology, Department Of Electronics And Communication, Kr Road, Vv Pura
- Bangalore, Karnataka
- India 560004
- Starts 15 January 2024 12:00 PM
- Ends 31 January 2024 05:02 PM
- All times are (UTC+05:30) Chennai
- No Admission Charge