Thermal-Centric Design Methodologies for Monolithic 3D Integrated Circuits

#Thermal #Monolithic
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Vertical integration has emerged as a game-changer technology to achieve higher device density, functional heterogeneity, and shorter wirelengths for intra-chip communication. Among various 3D technologies, monolithic 3D (M3D) ICs achieve unprecedented device and interconnect density due to sequential fabrication of multiple device tiers and vertical interconnects with diameters in the range of tens of nanometers. A fundamental challenge in dense integration technologies is the effective consideration of thermal constraints during the design process. In the first part of this talk, I will first provide a brief overview of 3D technologies, highlighting the recent advances and challenges related to the fabrication processes. I will then discuss the unique thermal characteristics of M3D ICs, describing the major differences with through silicon via (TSV) based 3D ICs. These results will rely on thermal simulations of M3D systems by leveraging a process design kit and cell library that we developed. I will also present a thermal-centric design optimization methodology for M3D integrated deep neural network (DNN) accelerators and demonstrate how technology-dataflow co-design can achieve an order of magnitude improvement in inference per second per Watt per footprint. In the second part of the talk, I will focus on the thermal crosstalk among the tiers and how such crosstalk can be used by an adversary to establish high bandwidth thermal covert-channels. I will finish the talk by proposing a new technique to dynamically detect such thermal covert-channels in M3D ICs.



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  • Date: 19 Mar 2024
  • Time: 06:00 PM to 07:30 PM
  • All times are (UTC-04:00) Eastern Time (US & Canada)
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  • 604 Bartholomew Road
  • Piscataway, New Jersey
  • United States 08854
  • Building: Busch Student Center
  • Room Number: 116 ABC

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  • Starts 07 March 2024 12:00 AM
  • Ends 19 March 2024 06:00 PM
  • All times are (UTC-04:00) Eastern Time (US & Canada)
  • No Admission Charge


  Speakers

Prof Emre Salman

Topic:

Thermal-Centric Design Methodologies for Monolithic 3D Integrated Circuits

Vertical integration has emerged as a game-changer technology to achieve higher device density, functional heterogeneity, and shorter wirelengths for intra-chip communication. Among various 3D technologies, monolithic 3D (M3D) ICs achieve unprecedented device and interconnect density due to sequential fabrication of multiple device tiers and vertical interconnects with diameters in the range of tens of nanometers. A fundamental challenge in dense integration technologies is the effective consideration of thermal constraints during the design process. In the first part of this talk, I will first provide a brief overview of 3D technologies, highlighting the recent advances and challenges related to the fabrication processes. I will then discuss the unique thermal characteristics of M3D ICs, describing the major differences with through silicon via (TSV) based 3D ICs. These results will rely on thermal simulations of M3D systems by leveraging a process design kit and cell library that we developed. I will also present a thermal-centric design optimization methodology for M3D integrated deep neural network (DNN) accelerators and demonstrate how technology-dataflow co-design can achieve an order of magnitude improvement in inference per second per Watt per footprint. In the second part of the talk, I will focus on the thermal crosstalk among the tiers and how such crosstalk can be used by an adversary to establish high bandwidth thermal covert-channels. I will finish the talk by proposing a new technique to dynamically detect such thermal covert-channels in M3D ICs.

Biography:

Emre Salman (S'03-M'10-SM'17) received the B.S. degree in microelectronics engineering from Sabanci University, Istanbul, Turkey, in 2004, and the M.S. and Ph.D. degrees in electrical engineering from the University of Rochester, NY, USA, in 2006 and 2009, respectively. Since 2010, he has been with the Department of Electrical and Computer Engineering, Stony Brook University (SUNY), NY, USA, where he is currently an Associate Professor. His broad research interests include analysis, modeling, and design methodologies for integrated circuits and VLSI systems with applications to energy-efficient and secure computing, Internet of things with energy harvesting, and implantable devices. He was with Sabanci University as a Visiting Professor during Spring 2020 and with the Air Force Research Labs as a Visiting Faculty Researcher during part of Summer 2021. He is the leading author of a comprehensive tutorial book titled High Performance Integrated Circuit Design (McGraw-Hill, 2012, Chinese translation, 2015).

Dr. Salman was a recipient of the National Science Foundation CAREER Award in 2013, the Outstanding Young Engineer Award from IEEE Long Island, NY, USA, in 2014, and the Technological Innovation Award from IEEE Region 1 in 2018. He was selected as Distinguished Lecturer of the IEEE Circuits and Systems (CAS) Society for 2023 and 2024. He also received multiple outreach initiative awards from the IEEE CAS Society. He currently serves as the Americas Regional Editor for the Journal of Circuits, Systems and Computers, on the Editorial Board of IEEE Transactions on Emerging Topics in Computing, and on the organizational/technical committees of various IEEE and ACM conferences. He previously served as the Chair (2020-2022) for the VLSI Systems and Applications Technical Committee (VSA-TC) of the IEEE CAS Society.

Email:

Address:257 Light Engineering, , Stony Brook University, Stony Brook, NY, United States, 11794





Agenda

6:00 - 6:15  - Refreshments and Networking

6:15 - 7:15 - Presentation