IEEE CTS CAS/SSC Meeting: Ultra low-power analog front-end design
Technical Seminar
Date and Time
Location
Hosts
Registration
- Date: 02 Feb 2017
- Time: 05:00 PM UTC to 06:00 PM UTC
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- 201 East 24th St
- Austin, Texas
- United States 78712
- Building: POB
- Room Number: 2.402
- Click here for Map
- Contact Event Host
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See link to map above. Occasionally you might find street level parking for free -- but watch out for the parking signs and restrictions. Another place to park is SJG, the San Jacinto Garage -- after 6PM, it is $7 to park all night.
Speakers
Pieter Harpe of Eindhoven University of Technology
Ultra low-power analog front-end design
Biography:
Talk Abstract:
This talk, based on a recent publication, discusses the design of a nano-power analog front-end including pre-amplification and analog-to-digital conversion. It starts with fundamentals on power-efficiency in analog and mixed-signal circuits. It also describes considerations in terms of low-voltage operation and PVT reliability. After that, the presentation discusses one complete system implementation in more detail, including the amplifier, ADC, biasing stages and clock generation.
Agenda
11am: seminar