James Morris of Portland State University, USA

Nanotechnologies offer a variety of material options for reliability improvements in microelectronics packaging, primarily in the applications of nanocomposites, or in the exploitation of the superior properties of carbon nanotubes and graphene. Nanoparticle composite materials are studied for resistors, high-k dielectrics, electrically conductive adhesives, conductive “inks”, underfill fillers, and solder enhancements, while nanowires, carbon nanotubes (CNTs), and graphene may also find thermal, interconnect, and shielding applications. The presentation will briefly cover electronics packaging as an introduction to nanopackaging, and then will emphasize some selected recent developments in the field, specifically:

•      Printed and sintered nanoparticle interconnects

•      Nanoparticle film sensors for electronics package reliability

•      Carbon nanotube (CNT) and graphene applications

and concluding with some relevant EHS (environment, health, and safety) cautions.

Biography:

James Morris is an ECE Professor Emeritus at Portland State University, Oregon, and an IEEE Life Fellow. He founded the Institute for Electronics Packaging Research (which became the Integrated Electronics Engineering Center) at SUNY-Binghamton and served as EE/ECE Department Chair there and at Portland State.  He has B.Sc. (1965) and M.Sc.(hons) degrees (1967) in Physics from the University of Auckland, NZ, and a Ph.D. in EE from the University of Saskatchewan, Canada, and was awarded a Doctor Honoris Causa degree by Bucharest Polytechnic University in 2015. Jim has served the IEEE Electronics Packaging Society (EPS,) including when it was CPMT, as Treasurer (1991-1997,) BoG member (1996-1998), VP for Conferences (1998-2003,) Distinguished Lecturer (2000- ,) CPMT-Transactions Associate-Editor (1998- ,) the EPS IEEE Nanotechnology Council (NTC) representative (2007-2012,) etc., and won the 2005 CPMT David Feldman Outstanding Contribution Award. He has co-authored one book on electronics packaging reliability and edited five more, including two (2008, 2018) on nanopackaging, and co-edited two on nanoelectronics.

He served as the NTC Awards Chair (2008-2012,) Conferences VP (2013-204,) Finance VP (2015-2018,) President-Elect (2019,) President (2020-2021,) Past-President (2022-2023,) and the Fellows Search Committee Chair (2024- .) He established the Nanotechnology Council Nanopackaging TC, which also functions as the EPS Nanotechnology TC, contributes to IEEE Nanotechnology Magazine, chaired NANO 2011 and 2020, and NMDC 2018, and was Program Chair for NMDC 2023. His research interests have ranged from isotropic conductive adhesives, nanopackaging, nanoelectronics simulation, and discontinuous thin metal films to automotive engine control.  He is actively involved in international engineering education and NTC chapter development. Locally, he founded or co-founded the Oregon Chapters of the IEEE Education Society, EPS, and NTC. He has had numerous international visiting appointments, most notably with Nokia-Fulbright (Finland,) Erskine (N.Z.) and the Royal Academy of Engineering (U.K.) Fellowships. Jim has taught continuously for 59 years, mainly online to China most recently, and published 63 journal papers, 107 refereed conference papers, 33 book chapters, and one patent, plus ~80 other conference presentations.

Ram Achar of Carleton University, Canada

With the increasing demands for higher signal speeds coupled with the need for decreasing feature sizes, signal integrity effects such as delay, distortion, reflections, crosstalk, ground bounce and electromagnetic interference have become the dominant factors limiting the performance of high-speed systems. These effects can be diverse and can seriously impact the design performance at all hierarchical levels including integrated circuits, printed circuit boards, multi-chip modules and backplanes. If not considered during the design stage, signal and power integrity effects can cause failed designs. Since extra iterations in the design cycle are costly, accurate prediction of these effects is a necessity in high-speed designs. Consequently, preserving signal integrity has become one of the most challenging tasks facing designers of modern multifunction and miniature electronic circuits and systems. This talk provides a comprehensive approach for understanding the multidisciplinary problem of signal and power integrity: issues/modeling/analysis in high-speed designs.

Biography:

Ramachandra Achar received the B. Eng. degree in electronics engineering from Bangalore University, India in 1990, M. Eng. degree in micro-electronics from Birla Institute of Technology and Science, Pilani, India in 1992 and the Ph.D. degree from Carleton University in 1998.

Dr. Achar currently is a professor in the Department of Electronics Engineering at Carleton University. Before joining Carleton University faculty (2000), he served in various capacities in leading research labs, including T. J. Watson Research Center, IBM, New York (1995), Larsen and Toubro Engineers Ltd., Mysore (1992), Central Electronics Engineering Research Institute, Pilani, India (1992) and Indian Institute of Science, Bangalore, India (1990). His research interests include signal/power integrity analysis, EMC/EMI analysis, circuit simulation, parallel and numerical algorithms, microwave/RF algorithms, modeling/simulation methodologies for sustainable and renewable energy, and mixed-domain analysis.

Dr. Achar has published over 250 peer-reviewed articles in international transactions/conferences, six multimedia books on signal integrity and five chapters in different books. Dr. Achar received several prestigious awards, including Bharat Guarav Award (2014), Carleton university research achievement awards (2010 & 2004), NSERC (Natural Science and Engineering Research Council) doctoral medal (2000), University Medal for outstanding doctoral work (1998), Strategic Microelectronics Corporation (SMC) Award (1997) and Canadian Microelectronics Corporation (CMC) Award (1996).

Prof. Achar currently serves as a Distinguished Lecturer of the IEEE Electronic Packaging Society and chair of the Distinguished Lecturer of Program for the IEEE EMC Society. He also previously served on the executive/steering/technical-program committees of several leading IEEE international conferences, such as EPEPS, EDAPS, and SPI, etc., and in the technical committees, EDMS (TC-12 of EPS). He is a founding faculty member of the Canada-India Center of Excellence, chair of the joint chapters of CAS/EDS/SSC societies of the IEEE Ottawa Section, and a consultant for several leading industries focused on high-frequency circuits, systems, and tools. Dr. Achar is a practicing professional engineer of Ontario and a Fellow of the Engineers Institute of Canada and IEEE.