IEEE Sensors Council Hyderabad Section Chapter Online Talk "Intel Hybrid architecture overview and Future of Backend Design (P-Core)"
IEEE Sensors Council Hyderabad Section Chapter Online Talk "Intel Hybrid Architecture Overview and Future of Backend Design (P-Core)"
Intel core processors integrate two types of cores into a single die: Powerful Performance-cores (P-cores) and flexible Efficient-cores (E-cores). The P-Core Intel's hybrid architectures typically involve combining high-performance cores with energy-efficient cores.
Performance-cores are:
- Physically larger, high-performance cores designed for raw speed while maintaining efficiency.
- Tuned for high turbo frequencies and high IPC (instructions per cycle).
- Ideal for crunching through the heavy single-threaded work demanded by many game engines.
- Capable of hyper-threading, which means running two software threads at once.
To enlighten participants with more information on P-Cores, IEEE Sensors Council Hyderabad Section Chapter is organizing a talk titled "Intel Hybrid architecture overview and Future of Backend Design (P-Core)" on 9th May 2024 at 7.00 PM.
Speaker: Mr. Phani Anand Gollapudi, Senior Technical Lead, P-Core, Intel, California
Mode: Online
Registration Link: https://events.vtools.ieee.org/event/register/419522
Date: 9th May 2024
Time: 7.00 PM to 8.30 PM (IST)
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Dr. Sangeeta Singh, Chair IEEE Hyderabad Section Sensors Council Chapter- sangeeta.singh@ieee.org
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Dr. V Priyanka Brahmaiah, Vice Chair, IEEE Hyderabad Section Sensors Council Chapter- priyanka.veeramosu@ieee.org
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Agenda
Agenda:
1. Welcome Address
2. Introduction of the Speaker
3. Technical Talk
4. Vote of Thanks