IEEE PCJS SSCS DL : Prof Mazzanti : Breaking the Phase-Noise Barrier with Multi-Core and Series-Resonance Harmonic Oscillators in BiCMOS Technology
The talk begins with a review of the fundamental and technological limiting factors to the spectral purity of integrated RF oscillators, and then proposes circuit solutions to break the phase noise barrier in silicon technology. Phase noise can be scaled by resorting to the multi-core approach, provided mismatches among multiple oscillators are carefully considered. As an example, a 16-core (voltage-controlled) oscillator demonstrates -130dBc/Hz at 1MHz offset from 20 GHz minimum phase.
A more elegant and efficient approach is then introduced. Leveraging the series resonance of a tank, the remarkably lower resistance rises considerably the tank active power, thus enabling a remarkable improvement on the spectral purity. Two 10GHz BiCMOS VCOs exploiting the concept are proposed. The measured minimum phase noise is −138 dBc/Hz at 1-MHz offset with 600mW from 1.2-V supply. Experimental results demonstrate the lowest phase noise ever reported by fully integrated RF oscillators in a silicon technology.
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- Date: 10 Jul 2024
- Time: 12:00 PM to 01:00 PM
- All times are (UTC-04:00) Eastern Time (US & Canada)
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- Starts 16 May 2024 12:00 AM
- Ends 09 July 2024 12:00 AM
- All times are (UTC-04:00) Eastern Time (US & Canada)
- No Admission Charge
Speakers
Prof Mazzanti
IEEE PCJS SSCS DL : Prof Mazzanti : Breaking Phase-Noise Barrier w/ Multi-Core and Series-Resonance Harmonic Oscillator
The talk begins with a review of the fundamental and technological limiting factors to the spectral purity of integrated RF oscillators, and then proposes circuit solutions to break the phase noise barrier in silicon technology. Phase noise can be scaled by resorting to the multi-core approach, provided mismatches among multiple oscillators are carefully considered. As an example, a 16-core (voltage-controlled) oscillator demonstrates -130dBc/Hz at 1MHz offset from 20 GHz minimum phase.
A more elegant and efficient approach is then introduced. Leveraging the series resonance of a tank, the remarkably lower resistance rises considerably the tank active power, thus enabling a remarkable improvement on the spectral purity. Two 10GHz BiCMOS VCOs exploiting the concept are proposed. The measured minimum phase noise is −138 dBc/Hz at 1-MHz offset with 600mW from 1.2-V supply. Experimental results demonstrate the lowest phase noise ever reported by fully integrated RF oscillators in a silicon technology.
Biography:
Andrea Mazzanti (S’02–M’09–SM’13) received the Laurea and Ph.D. degrees in electrical engineering from the University of Modena and Reggio Emilia, Modena, Italy, in 2001 and 2005, respectively. During the summer of 2003, he was with Agere Systems, Allentown, PA as an Intern. From 2006 to 2009, he was Assistant Professor with the University of Modena and Reggio Emilia. In January 2010, he joined the University di Pavia where he is now Full Professor of electronics. He has authored over 150 technical papers. His main research interests cover device modeling and IC design for high-speed communications, RF and millimeter-wave systems. Dr. Mazzanti has been a member of the Technical Program Committee of the IEEE Custom Integrated Circuit Conference (CICC) from 2008 to 2014, IEEE European Solid State Circuits Conference (ESSCIRC) and IEEE International Solid State Circuits Conference (ISSCC) from 2014 to 2018. He has been Associate Editor for the Transactions on Circuits and Systems-I from 2012 to 2015 and Guest Editor for special issues of the Journal of Solid State Circuits dedicated to CICC 2013-14 and ESSCIRC-2015. Since 2017, he has been serving as an Associate Editor for the IEEE Solid-State Circuits Letters
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Agenda
Noon - 1pm EST : DL with Q/A