Susanna Reggiani

Biography:

Susanna Reggiani received the Ph.D. degree in Electrical Engineering from the University of Bologna, Italy, in 2001. Since 2002 she has been with the Department of Electrical, Electronic, and Information Engineering (DEI) and with the Advanced Research Center for Electronic Systems (ARCES).  In 2020 she became Full Professor at the University of Bologna. Her scientific activity has been devoted to the physics, modeling and characterization of electron devices, with special emphasis on transport models in semiconductors. She has been involved in research activities concerning advanced CMOS and beyond-CMOS transistors. She contributed to the development of physical models in the frame of a deterministic solution of the Boltzmann transport equation based on the spherical-harmonics expansion. Since 2007, she has been working in projects dealing with the modeling, design and TCAD analysis of power MOSFETs. She worked on the modeling of hot-carrier stress degradation in LDMOS devices and on the investigations of the package influences on high-voltage semiconductor FETs. She is presently involved in projects on the development of TCAD approaches and physically-based models for GaN/AlGaN HEMTs and SiC-based power MOSFETs.

Elena Gnani

Biography:

Elena Gnani received the M.S. degree in Electrical Engineering "summa cum laude" and the Ph.D degree in Electrical Engineering and Computer Science in 2003, both from the University of Bologna, where she is currently Associate Professor. She has been involved in several National and European Projects and her research activities have been carried out in cooperation with worldwide semiconductor research centers and semiconductor industries. E. Gnani is author or co-author of more than 200 papers published in referred international journals and in proceedings of major international conferences, and of several invited contributions, and has been involved in outstanding conferences such as IEDM, DATE, ESSDERC, EDTM, EUROSOI-ULIS. She is a member of the IEEE Electron Devices Society (EDS) from 2001, and is presently an IEEE Senior Member and EDS Distinguished Lecturer for Region8. She is also an EDS Region 8 SRC Vice Chairs and serves as an associate editor of the IEEE Transactions on Electron Devices.

Yogesh Chauhan

Wladek Grabinski

Mike Brinson

On going improvements in semiconductor device technologies have highlighted both the importance and the need for Free and Open Source Software (FOSS) that supports both compact modelling and IC circuit design based on "manufacturers open-source Production Development Kits" (PDK). This presentation outlines the evolution of the Quite Universal Circuit simulator (Qucs-S) as an integrated IC design tool with compact modelling capabilities and  simulation features  that support analog, RF and mixed Signal IC Design using the IHP 130nm BiCMOS Open Source PDK. A series of example models and simulation test benches are included in the talk. These demonstrate new Qucs-S features and their application.  All the software introduced is freely available from the internet under the GPL license.

Ram Achar

With the increasing demands for higher signal speeds coupled with the need for decreasing feature sizes, signal integrity effects such as delay, distortion, reflections, crosstalk, ground bounce and electromagnetic interference have become the dominant factors limiting the performance of high-speed systems. These effects can be diverse and can seriously impact the design performance at all hierarchical levels including integrated circuits, printed circuit boards, multi-chip modules and backplanes. This talk provides a comprehensive approach for understanding the multidisciplinary problem of signal integrity: issues/modeling/analysis in high-speed designs.

Biography:

Prof. Achar currently is a professor in the department of electronics engineering at Carleton University, Canada (since 2000). He also served in various capacities in leading research labs, including T. J. Watson Research Center, IBM, New York (1995), Larsen and Toubro Engineers Ltd., Mysore (1992), Central Electronics Engineering Research Institute, Pilani, India (1992) and Indian Institute of Science, Bangalore, India (1990).  He has published over 250 peer-reviewed articles in international transactions/conferences, six multimedia books on signal integrity and five chapters in different book and has received numerous prestigious awards recognizing his research contributions. His research interests include signal/power integrity analysis, high-speed interconnects, circuit simulation, parallel and numerical algorithms and microwave/RF/EMC/EMI mixed-domain analysis. Prof. Achar currently serves as a Distinguished Lecturer of the IEEE Electronic Devices Society and IEEE Electronic Packaging Society, Chair of the Distinguished Lecturer of program. He also serves in several executive/steering/advisory/technical-program committees of several leading IEEE international conferences, such as EPEPS, EDAPS and SPI etc.  Dr. Achar is a practicing professional engineer of Ontario, a Fellow of Engineers Institute of Canada and IEEE. 

M. De Souza

This talk will showcase a three-terminal non-filamentary  ZnO/Ta₂O₃ Thin Film Transistor from our lab for tasks such as image and audio signal processing, with high accuracy.  We have demonstrated the device can be operated in the off-state to minimise power consumption. Its unique negative differential resistor in the gate current characteristics makes it an active memristor.  The memory decay, of the order of seconds, is well matched to time scales observed in biology and easily adjustable via the gate voltage.  This makes it a promising option for wearable sensors.

Biography:

Maria Merlyne De Souza received her PhD from the University of Cambridge.  She became Professor of Electronics and Materials at the Emerging Technologies Research Centre, De Montfort University in 2003 and Professor of Microelectronics at the University of Sheffield in 2007. She is VP of Emerging technologies for the IEEE-EDS society and has co-authored over 110 journal papers and 180 conferences.

Radu Sporea

Source-gated transistors (SGTs) have a relatively long history of development but only recently have mainstream technologies allowed for their effective implementation at scale. This talk is addressed to those interested in efficient analog and mixed signal design with advanced thin-film transistors. They provide a development progression with a forward look toward SGT application to future edge processing of sensor data, signal conditioning, and current-mode driving. Crucially, the concept can be applied in practically any material system. As such, the talk will present the fundamentals of contact effect engineering and modelling, design rules for successful SGT implementation, specifics of performance optimisation in thin-film silicon, organic, and oxide semiconductors, and structural evolutions for additional functionality. Finally, the next step in the evolution of contact-controlled thin-film transistor, the multimodal transistor (MMT) will be briefly introduced. 

Biography:

Dr Radu Sporea is Associate Professor in Power Electronics and Semiconductor Devices at the Advanced Technology Institute (ATI), University of Surrey and holds an EPSRC Early Career Fellowship (2021-2026).

Prior to this appointment he was Royal Academy of Engineering Academic Research Fellow (2011-2016), EPSRC PhD+ Fellow (2010-2011) and PhD researcher (2006 – 2010) in the same centre. Before joining Surrey, Radu has studied Computer Systems Engineering at “Politehnica” University, Bucharest, Romania, and has worked as a Design Engineer for Catalyst Semiconductor Romania, now part of ON Semiconductor, on ultra-low-power CMOS analog circuits. Radu’s was named an EPSRC Rising Star in 2014 and was the recipient of the I K Brunel Award for Engineering in 2015. He was presented the Vice Chancellor’s award for Early Career Teaching in 2017 and won the Tony Jeans Inspirational Teaching distinction in 2018. In 2021, he was a finalist of the Innovator of the Year prize at Surrey. Radu chaired the 17th International Thin Film Transistor Conference (ITC2022) held as a hybrid event on the University of Surrey campus.

Radu has been awarded over £2.7M in funding and collaborates with over 20 international groups. He the Chair of the IEEE Electron Devices Society UK and Ireland Chapter and has served as guest edited two special issues of IEEE Transactions on Electron devices.

Research topics focus on advanced large-area semiconductor device design, including transistors with increased tolerance to fabrication variability, improved energy efficiency and high gain. Research interest ranges from modelling and simulations and device structure optimization to fabrication across numerous conventional and additive technologies and bespoke circuit design, toward large scale sensor and driver arrays for user interfaces, health and environmental monitoring.