IEEE FABulous - Week 7
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In the 7th week of FAB.ulous we will conduct a session which will help the participants to understand the nuances of digital design. We are happy to have Mr. Abhishek from industry who will deliver the session and address different questions of the attendees. A must-attend session for this design contest.
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- Starts 03 October 2024 06:30 PM UTC
- Ends 05 October 2024 06:30 PM UTC
- No Admission Charge
Speakers
Abhishek Singhania of Western Digital
Topic:
Overview of sequential circuit design - An integral part of SoC design
Sequential logic is an integral part of digital design. One has to understand the details of it. Mr. Abhishek shall cover the concepts and usage of sequential circuits.
Address:Prestige Tech Park, Kadubeesaahalli, Bangalore, India, 560102
Agenda
- Revisiting the FABulous design contest
- Lecture on digital design practice in industry
- Design review (if any) from the teams
- Q & A