IEEE FABulous - Week 7

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In the 7th week of FAB.ulous we will conduct a session which will help the participants to understand the nuances of digital design. We are happy to have Mr. Abhishek from industry who will deliver the session and address different questions of the attendees. A must-attend session for this design contest.

 

Abhishek


  Date and Time

  Location

  Hosts

  Registration


  • Date: 06 Oct 2024
  • Time: 10:00 AM to 11:59 AM
  • All times are (UTC+05:30) Chennai
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  • Starts 04 October 2024 12:00 AM
  • Ends 06 October 2024 12:00 AM
  • All times are (UTC+05:30) Chennai
  • No Admission Charge

  Speakers

Abhishek Singhania of Western Digital

Topic:

Overview of sequential circuit design - An integral part of SoC design

Sequential logic is an integral part of digital design. One has to understand the details of it. Mr. Abhishek shall cover the concepts and usage of sequential circuits.

Address:Prestige Tech Park, Kadubeesaahalli, Bangalore, India, 560102




Agenda

  • Revisiting the FABulous design contest

  • Lecture on digital design practice in industry

  • Design review (if any) from the teams

  • Q & A