UK and Ireland SSCS Chapter DL - Prof. Makoto Ikeda - Acceleration of Encryption Algorithms, Elliptic Curve, Pairing, Post Quantum Cryptoalgorithm (PQC), and Fully Homomorphic Encryption (FHE)

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The UK and Ireland Solid-State Circuits Society Chapter is organising a series of Distinguished Lectures in Tyndall National Institute, Cork, Ireland as hybrid meetings on 29 October 2024. 

Prof. Makoto Ikeda, The University of Tokyo, Japan will present Acceleration of Encryption Algorithms, Elliptic Curve, Pairing, Post Quantum Cryptoalgorithm (PQC), and Fully Homomorphic Encryption (FHE) from 15:30 - 16:30 on 29 October 2024.

Acceleration of Encryption Algorithms, Elliptic Curve, Pairing, Post Quantum Cryptoalgorithm (PQC), and Fully Homomorphic Encryption (FHE) Abstract

This lecture will cover basics of public-key encryption, and example design optimization of elliptic-curve based encryption algorithm, including pairing operations, and its security measures. Then extend design optimization on lattice-based encryption algorithms including post quantum crypto-algorithm, CRISTALS-Kyber/Dilithium, isogeny based encryption argorithms, and fully homomorphic encryption algorithm.

 


  Date and Time

  Location

  Hosts

  Registration


  • Date: 29 Oct 2024
  • Time: 03:30 PM to 04:30 PM
  • All times are (UTC+00:00) Dublin
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  • Tyndall National Institute
  • Cork, Cork
  • Ireland
  • Contact Event Host
  • Starts 21 October 2024 12:00 AM
  • Ends 29 October 2024 10:00 AM
  • All times are (UTC+00:00) Dublin
  • No Admission Charge

  Speakers

Prof. Makoto Ikeda

Biography:

Makoto Ikeda received the BE, ME, and Ph.D. degrees in electrical engineering from the University of Tokyo, Tokyo, Japan, in 1991, 1993 and 1996, respectively. He joined the University of Tokyo as a research associate, in 1996, and now professor and director of Systems Design Lab(d.lab), the University of Tokyo. At the same time he has been involving the activities of VDEC(VLSI Design and Education Center, the University of Tokyo), to promote VLSI design educations and researches in Japanese academia. He worked for hardware security, asynchronous circuits design, smart image sensor for 3-D range finding, and time-domain signal processing. He has been serving various positions of various international conferences, including ISSCC ITPC Chair(ISSCC 2021), IMMD sub-committee chair (ISSCC 2015-2018), A-SSCC 2015 TPC Chair, VLSI Circuits Symposium PC Chair(2017)&Symposium Chair(2019). He is a senior member of IEEE, IEICE Japan, and a member of IPSJ and ACM.




Agenda

Introduction to Speaker

Distinguished Lecture

Discussion, Q&A