Analog Design Flow Using Cadence Design Suite-3

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Cadence Design Suite-3
IEEE-IPEC Circuits and Systems Society is organizing a Training Session on Analog Design Flow Using Cadence Design Suite-3 for ECE-2nd year students. This training is a valuable opportunity to enhance the skill set in Analog Design field using industry's leading design tool.
The details are as follows:
Resource Persons: Dr. Shafali Jagga, Mr. Vishal Gupta
Date: 19 November, 2024
Venue: CAD Lab 

Training Highlights:

  • Overview of Cadence Design Suite 
  • Introduction, design, simulation and analysis of wave shaping RC Circuits 
  • Interactive Session with hands-on training

  Date and Time

  Location

  Hosts

  Registration


  • Date: 19 Nov 2024
  • Time: 08:30 AM UTC to 11:30 AM UTC
  • Add_To_Calendar_icon Add Event to Calendar
  • 63, Site IV, Sahibabad Industrial Area, Surya Nagar Flyover Road,
  • Ghaziabad, Uttar Pradesh
  • India 201010
  • Contact Event Hosts

  Speakers

Dr. Shafali Jagga

Topic:

Analog Design Flow Using Cadence Design Suite

Address:63, Site IV, Sahibabad Industrial Area, , Surya Nagar Flyover Road, Sahibabad, , Ghaziabad, India, 201010

Mr. Vishal Gupta

Topic:

Analog Design Flow Using Cadence Design Suite





  Media

Poster 128.60 KiB
Attendance 123.47 KiB
Image 1 109.79 KiB
Image 2 173.99 KiB
Image 3 128.79 KiB