IEEE SSCS Utah Chapter Lecture by Dr. Keith A. Bowman
We are pleased to welcome Dr. Keith A. Bowman, Principal Engineer at Qualcomm Technologies, Inc., as our Distinguished Lecturer. Dr. Bowman will be speaking at BYU on the topic of "Adaptive Designs for Processor Performance, Energy Efficiency, and Reliability". Keith brings a wealth of industry experience on this topic pertaining to today's cutting edge IC design.
System-on-chip (SoC) processors are used across a wide range of market segments, including Internet of Things (IoT), mobile, laptop, automotive, and datacenter, experience dynamic device, circuit, and system parameter variations during the operational lifetime. These dynamic parameter variations include supply voltage droops, temperature changes, transistor aging, and workload fluctuations, degrade processor performance, energy efficiency, yield, and reliability. This lecture introduces the primary variation sources and the negative impact of these variations across voltage and clock frequency operating conditions. Dr. Bowman will also present adaptive processor designs to mitigate the adverse effects from dynamic parameter variations, while highlighting the key trade-offs and considerations for product deployment.
Additionally, Dr. Bowman will provide a follow up lecture entitled, "How to Write a Strong SSCS Paper" for those that are interested.
This event requires pre-registration by March 12, 2025.
Date and Time
Location
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Registration
- Date: 13 Mar 2025
- Time: 11:00 AM to 11:55 AM
- All times are (UTC-06:00) Mountain Time (US & Canada)
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- Brigham Young University, Campus Dr
- Provo, Utah
- United States 84604
- Building: Engineering Building
- Room Number: Event Space
- Click here for Map
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- Co-sponsored by Brigham Young University College of Engineering
- Starts 31 January 2025 12:00 AM
- Ends 12 March 2025 02:00 PM
- All times are (UTC-06:00) Mountain Time (US & Canada)
- Admission fee (optional) ?
Speakers
Keith Bowman
Biography:
Keith A. Bowman is a Principal Engineer and Manager in the System-on-Chip (SoC) Research Lab at Qualcomm Technologies, Inc. in Raleigh, NC, USA. He directs the research and development of circuit and system technologies to improve the performance, energy efficiency, yield, reliability, and security of Qualcomm processors. He pioneered the invention, design, and test of Qualcomm’s first commercially successful circuit for mitigating the adverse effects of supply voltage droops on processor performance, energy efficiency, and yield. He received the B.S. degree from North Carolina State University in 1994 and the M.S. and Ph.D. degrees from the Georgia Institute of Technology in 1995 and 2001, respectively, all in electrical engineering. From 2001 to 2013, he worked in the Technology Computer-Aided Design (CAD) Group and the Circuit Research Lab at Intel Corporation in Hillsboro, OR, USA. In 2013, he joined the Qualcomm Corporate Research and Development (CRD) Processor Research Team. Dr. Bowman has published 90+ technical papers in refereed conferences and journals, authored one book chapter, received 30+ US patents and 50+ international patents, and presented 50+ tutorials on variation-tolerant circuit designs. He received the 2016 Qualcomm CRD Distinguished Contributor Award for Technical Contributions, representing CRD’s highest recognition, for the pioneering invention of the auto-calibrating adaptive clock distribution circuit, which significantly enhances processor performance, energy efficiency, and yield and is integral to the success of the Qualcomm® Snapdragon™ 820 and future processors. He received the 2022 Qualcomm IP Achievement Award for high-quality inventions, leading to strong processor performance and energy-efficiency improvements and differentiated products. Since 2018, he served on the Qualcomm Low-Power Circuit Design Patent Review Board. In 2019 and 2020, he was as an IEEE SSCS Distinguished Lecturer (DL). He is currently serving a 2nd 2-year term as an IEEE SSCS DL. From 2020 to 2023, he served as an IEEE SSCS Mentor. He was the International Technical Program Committee (ITPC) Chair and the General Conference Chair for ISQED in 2012 and 2013, respectively, and for ICICDT in 2014 and 2015, respectively. He has served on the ISSCC ITPC as a member of the Digital Circuits (DCT) Subcommittee from 2016 to 2020 and as the DCT Chair from 2020 to 2024. He currently serves as the ISSCC Program Vice Chair. He is a Fellow of the IEEE.
Address:United States
Agenda
Dr. Bowman's lecture will start promptly at 11:00am MST in the BYU Engineering Building (EB) Event Space. A Question and Answer session will follow at 11:45am.
A pizza lunch will be provided from 12:15pm to 1:30pm. Lunch is free for IEEE members, with a $6.00 charge for non-members.
A special follow up lecture and Question and Answer session will begin at 1:30pm in Room CB 490, in which Dr. Bowman will discuss, “How to Write a Strong SSCS Paper." This will last approximately 1 hour.