Advancements in VLSI/Semiconductor Industry and Introduction to Design for Test (DFT) Methodologies

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Guest Lecture on "Advancements in VLSI/Semiconductor Industry and Introduction to Design for Test (DFT) Methodologies"

This guest lecture is aimed at providing a comprehensive overview of the latest advancements in the VLSI (Very-Large-Scale Integration) and semiconductor industries. The lecture will delve into the innovations that have propelled the growth and development of semiconductor technology, particularly focusing on the trends and breakthroughs that continue to shape this ever-evolving field.

Key areas of discussion will include:

  1. Overview of the VLSI/Semiconductor Industry:

    • An introduction to the VLSI and semiconductor sectors, highlighting the importance of semiconductor devices in modern technology.
    • Exploration of the latest trends such as miniaturization of chips, advances in fabrication technologies, and integration of complex systems onto a single chip (System on Chip - SoC).
    • The role of semiconductor devices in areas such as communication, computing, automotive, healthcare, and consumer electronics.

  2. Technological Advancements:

    • In-depth look at cutting-edge developments in VLSI technologies, including FinFETs, 3D ICs, and quantum computing integration.
    • An analysis of the impact of Artificial Intelligence (AI) and Machine Learning (ML) in semiconductor design, optimization, and production.

  3. Challenges and Future Trends:

    • Discussion on the current challenges faced by the semiconductor industry, such as power consumption, heat dissipation, and cost management.
    • Speculation on future technologies, such as neuromorphic computing and the role of advanced materials in semiconductor design.

    • FIG 6: Distributing student appreciation certificate by correspond ant madam


  Date and Time

  Location

  Hosts

  Registration


  • Add_To_Calendar_icon Add Event to Calendar
  • opp dupadu railway station
  • kurnool, Andhra Pradesh
  • India 518001
  • Building: SMART CLASS ROOM
  • Room Number: 5
  • Click here for Map
  • Contact Event Host

  • Dr.M.V.Sruthi

    STUDENT BRANCH COUNSELLOR

    HOD ECE

    Dr.KVSRIT KURNOOL

  • Co-sponsored by Electronics and communication engineering department -DrKVSRIT

  Speakers

PRAVEEN KUMAR of Dr.K.V.Subba Reddy Institute of Technolo

Topic:

Advancements in VLSI/Semiconductor Industry and Introduction to Design for Test (DFT) Methodologies

The Guest lecture conducted by Mr. K. Praveen Kumar Reddy provided an insightful overview of recent advancements in the VLSI (Very-Large-Scale Integration) and semiconductor industries, as well as an introduction to Design for Test (DFT) methodologies. The session was tailored for second-year B.Tech students to help them understand the foundational concepts and industry trends, bridging academic learning with practical applications

GLIMPSES OF GUEST LECTURE:

FIG 2: SCREEN ON THE DAY OF GUEST LECTURE

 

 

 

 

 

 

 

 

 

 

FIG 3: STUDENTS ATTENDED GUEST LECTURE ON VLSI ADVANCEMENTS

Biography:

EXPERIENCE
FE B - 2 02 4 TOP R E S E N T
DF T ENGINEER – QUA LCO MM INDIA PVT LTD- ( THRO UGH TR UEC HIP TEC HNOLO GIE S)
Worked On ATPG, DRC Debugging, Gate Keeper Checks (GKC).
Coordinated Between DFT And PD Teams, To Keep The DFT Structures Intact While Doing PD
Activities Such As Floor Plan, Placement And Routing
J U N2 02 2 TO FE B 2 02 4
DF T ENGINEER – GOOGLE INDIA P VT L TD – ( THRO UGH MIRA FRA TECHNOLOG IES)
Worked on Block level ATPG, and Pattern Retargeting in all the milestones up to BTO and MTO.
Expertise in DFT - DRC Debugging, GLS Simulations
A P R 2 02 2 TO A UG 2 02 2
TRAINEE DFT ENGINEER – CHIP EDGE TECHNOLOGIES, BANGALORE
J U N2 0 1 7 T O TI L L D A TE RESEA RCH SCHO LA R (P .T) – A NNA UNIVERS ITY, C HENNA I
Thesis Submitted-Titled: Interconnect array BIST (IBIST) Implementation to test Bundled
TSVs in Heterogeneous Three Dimensional Integrated Circuits
Published Article: Built-In Self Test (BIST) Architecture Simulation for Testing Cro...: Ingenta
Connect
D E C 2 0 12 TO M A Y2 02 2 ASSIS TA N T P ROFESSO R – RMD ENGINE ERING COLLEG E, A NNA UNIVERSITY, C HENNA I,
Taught Diffe rent Ele ct ri cal and Elect ronics Engineering Re lated Su bject s
to Underg raduate St u dent s
OC T 2 0 0 6 TO S E P 2 0 0 8 RESEA RCH A SSIS TA N T – VNIT (NA TIONA L INS TI TU TE OF TEC HNOLOGY )-NA GP UR , INDIA
Worked as Research Assistant at VLSI & Nano Electronics Design Labs at VNIT Nagpur.
Published Article: Paper ID 121
VDAT 2010: Accepted papers (tripod.com)
EDUCATION
E XP E C TE D I N F E B 2 02 5
( TH E S IS S UB M I T TE D )
DOCTOR OF PHILOSOPHY (PURSUING), ANNA UNIVERSITY, CHENNAI
Title of Thesis “Interconnect array BIST (IBIST) Implementation to test Bundled TSVs in
Heterogeneous Three Dimensional Integrated Circuits”
Published Article: Built-In Self Test (BIST) Architecture Simulation for Testing Cro...: Ingenta
Connect
J U NE 2 0 0 6 MASTER OF ENGINEERING, APPLIED ELECTRONICS, ANNA UNIVERSITY, CHENNAI
S E P 2 0 02 B.TECH- ELECTRICAL AND ELECTRONICS ENGINEERING, SK UNIVERSITY, A.P
SKILLS
 Good Knowledge Of DFT Concepts
 SCAN INSERTION,ATPG, JTAG (IEEE 1149.1) , IJTAG (IEEE 1687), IEEE 1500, PATTERN RETARGETTING, MBIST, OCC
 Experience in using DFT tools such as SEIMENS Tessent tool & SYNOPSIS TetraMax DFT tools
 VHDL & Verilog programming

Email:

Address:Site No. 610, BBMP Katha No.603, C – Block AECS Layout, Kundalahalli, Bengaluru , BANGALORE, Andhra Pradesh, India, – 560037




Agenda

Agenda for Guest Lecture on "Advancements in VLSI/Semiconductor Industry and Introduction to Design for Test (DFT) Methodologies"

Opening Remarks

  • Welcome address and introduction to the guest speaker.

  • Overview of the session and its relevance to the audience.

Session 1: Overview of the VLSI/Semiconductor Industry

  • Introduction to VLSI and the semiconductor ecosystem.

  • Significance of semiconductors in modern technology and daily life.

  • Key industries and applications relying on semiconductor technologies, such as consumer electronics, automotive, healthcare, and telecommunications.

  • Current trends in the semiconductor industry and ongoing challenges.

Session 2: Technological Advancements in VLSI/Semiconductor Industry

  • Recent breakthroughs in semiconductor technologies: FinFETs, 3D ICs, and integration of AI/ML.

  • The miniaturization of chips and the transition to smaller process nodes.

  • Innovations driving performance, efficiency, and cost reduction in semiconductor fabrication.

  • The potential of quantum computing and neuromorphic chips in future VLSI technologies.

Session 3: Introduction to Design for Test (DFT) Methodologies

  • Overview of Design for Test (DFT) and its importance in the semiconductor industry.

  • Key DFT techniques: Built-In Self-Test (BIST), scan chains, boundary scan, and Automatic Test Pattern Generation (ATPG).

  • The role of DFT in ensuring the reliability and manufacturability of VLSI circuits.

  • The relationship between design and testing teams in ensuring the quality of semiconductor products.

Session 4: Impact of DFT on the Semiconductor Industry

  • How DFT helps in optimizing yield, reducing manufacturing costs, and improving time-to-market.

  • The evolution of testing practices with the advent of DFT techniques.

  • Real-world examples and case studies where DFT methodologies have improved semiconductor performance.

  • Challenges faced in implementing DFT techniques in complex systems-on-chip (SoCs).

Q&A Session

  • Open floor for questions and interaction between the guest speaker and the audience.

  • Discussion on specific areas of interest, doubts, and further exploration of topics covered during the lecture


  Media

Advancements in VLSI/Semiconductor Industry guest lecture 1.86 MiB