High-Voltage Isolation Technology, from Process Development to Circuit Design
Galvanic isolation is a popular way of breaking ground loops in noisy, high voltage environments in various applications where ground currents can disrupt data transmission, damage equipment, and even hurt human operators. This talk will introduce the high voltage isolation technology, where process and circuit are developed together to deliver the best-in-class isolation performance. Various design trade-offs will be examined, and a compact design will be presented to show how to achieve the best performance yet with the highest channel density in the industry.
Date and Time
Location
Hosts
Registration
- Date: 28 Mar 2025
- Time: 07:00 PM UTC to 09:00 PM UTC
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- 177 College Ave
- Medford, Massachusetts
- United States 02155
- Building: Joyce Cummings Center (270)
- Room Number: 270
- Contact Event Host
- Co-sponsored by Tufts University
- Starts 12 March 2025 04:00 AM UTC
- Ends 28 March 2025 07:00 PM UTC
- No Admission Charge
Speakers
Ruida Yun of Analog Devices Inc.
High-Voltage Isolation Technology, from Process Development to Circuit Design
Biography:
Dr. Ruida Yun received the B.S. degree from Zhejiang University, China, in 2003, the M.S. degree from the Royal Institute of Technology (KTH), Sweden, in 2006 and the Ph.D. degree from Tufts University, Medford, MA, in 2011, all in electrical engineering. He is currently with Analog Devices Inc., Wilmington, MA, as a senior manager leading the advanced technology team working on high voltage isolation related process and product development. He has authored or coauthored 10 papers and holds 8 patents. His current research interests include high voltage digital isolator, high frequency isolated power converters and high speed circuit design.
Agenda
<Tentative Schedule>
3-3:15 PM EST: Networking and snacks
3:15-4:15pm EST: TechTalk followed by Q&A