The Challenges in Signal Integrity and Power Integrity to Meet the Demands of Expanding and Evolving Compute Platforms

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IEEE PES Distinguished Lecture 




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  • Date: 20 May 2025
  • Time: 07:00 AM UTC to 08:45 AM UTC
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  • Dr Fetene Mulugeta, AAiT. (0944026531)


    Dr Saravanakumar Gurusamy, FDRE TVTI (0987204395)

  • Co-sponsored by IEEE EPS


  Speakers

Wendem of Meta

Topic:

The Challenges in Signal Integrity and Power Integrity to Meet the Demands of Expanding and Evolving Compute Platforms

Abstract :

As compute platforms evolve from mainframes and desktops toward laptops, portable tablets, smartphones and AR/AV Devices and back to data centers (in the age of AI), the demands of signal integrity and power integrity (SI/PI) challenges have been growing and changing.  The newer platforms require more complex and sometimes drastically different SI/PI analysis approaches to optimize the system performance that are specific to these platforms.

In this talk, I will start with a review of the key methods developed in the last three decades to accurately solve very complex SI/PI problems, that have now become indispensable tools in designing the most powerful compute and communication electronic systems all around us.  These accomplishments have been possible with the use of techniques such as scattering parameters, recursive convolution, model order reduction, target impedance, statistical simulation etc.

Then, the SI/PI techniques were successfully used to solve the latest power distribution network challenges of current SoC chips from very low power to very large power with trillions of gates in the latest technology node as well as high-speed signaling challenges at the data rates beyond 224 Gbps were also examined. This will be followed by a brief introduction to the machine learning techniques, where the details of some of the most promising machine learning techniques applied to signal and power integrity problems are reviewed. These include machine learning techniques applied to model order reduction, target power impedance of power distribution of modern SoC, and design space exploration, to name a few.

 

Biography:

Biography:

Dr. Wendem Tsegaye Beyene (https://www.linkedin.com/in/wendem) has been employed, in the past, by IBMHewlett-Packard, and Agilent TechnologiesRambus, and Intel. He is currently an Analog & Mixed Signal Architect in Reality Labs at Meta Platforms

Dr. Beyene is an IEEE fellow, and a Senior Area Editor of IEEE CPMT and has served as a Distinguished Lecturer for IEEE EMCS as well as for IEEE EPS societies since 2020. He is also an elected Associate Fellow of the Ethiopian Academy of Sciences. Since 2022, he has organized an annual IEEE EPS and IEEE EDS sponsored conference, DTMES, in Addis AbabaEthiopia, with an intention of creating and boosting research in the areas of electronic design for devices, chips, packages, and systems in Ethiopia and the rest of Africa.

 

Address:United States





Agenda

9.30 : Registration 

9.45: Introduction to the Expert

10.00: Lecture by the Expert

11.30: End of Lecture 

11.35: Tea and Coffee for the participant

12:00 Networking 



IEEE Ethiopia Subsection