Analog Front-End Chip Implementation for Wearable Applications
Titre: Analog Front-End Chip Implementation for Wearable Applications
Conférencier: Surachoke Thanapitak , Professor, Electrical Engineering Department, Mahidol, Thailand University
Lieu: ÉTS, Pavillon A, Local A-2473 , 1100 Rue Notre-Dame Ouest, Montréal
Date et heure: vendredi le 25 avril 2025 de 10:30 à 11:30
Résumé: This talk presents a low-power analog front-end (AFE) chip for wearable ECG applications, featuring a low-noise amplifier (LNA) and nano-power OTA-C filter. The LNA offers high CMRR and low input-referred noise for accurate signal acquisition, while the filter effectively removes baseline drift and noise with minimal power. Fabricated in standard CMOS, the design achieves µV noise level and <1 µW power per channel, enabling high-fidelity ECG monitoring in energy-constrained wearables.
Note biographique: Surachoke Thanapitak (Member, IEEE) graduated with Electronic Engineering from King Mongkut’s Institute of Technology Ladkrabang (KMITL), Thailand, in 2004. He was awarded a Royal Thai Government scholarship and obtained an MSc in Analogue and Digital IC Design (2007) and a PhD in Electrical Engineering (2012) from Imperial College London, United Kingdom. In 2012, he joined the Department of Electrical Engineering at Mahidol University as a lecturer. Currently, he is an Associate Professor in Electronics. He serves as a reviewer for the IEEE Transactions on Circuits and Systems I & II, IEEE Transactions on Biomedical Circuits and Systems, IEEE Transactions on VLSI Systems, and the IEEE Sensors Journal. In 2018, he was a Research Fellow at National Tsing Hua University, Hsinchu, Taiwan. Additionally, he served as a Tutorial Co-Chair for the 2019 IEEE Asia-Pacific Conference on Circuits and Systems.
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- Date: 25 Apr 2025
- Time: 02:30 PM UTC to 03:30 PM UTC
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- Co-sponsored by ReSMiQ (Regroupement stratégique en microsystèmes du Québec)
Speakers
Surachoke Thanapitak of Electrical Engineering Mahidol, Thailand University
Analog Front-End Chip Implementation for Wearable Applications
Résumé: This talk presents a low-power analog front-end (AFE) chip for wearable ECG applications, featuring a low-noise amplifier (LNA) and nano-power OTA-C filter. The LNA offers high CMRR and low input-referred noise for accurate signal acquisition, while the filter effectively removes baseline drift and noise with minimal power. Fabricated in standard CMOS, the design achieves µV noise level and <1 µW power per channel, enabling high-fidelity ECG monitoring in energy-constrained wearables.
Biography:
Note biographique: Surachoke Thanapitak (Member, IEEE) graduated with Electronic Engineering from King Mongkut’s Institute of Technology Ladkrabang (KMITL), Thailand, in 2004. He was awarded a Royal Thai Government scholarship and obtained an MSc in Analogue and Digital IC Design (2007) and a PhD in Electrical Engineering (2012) from Imperial College London, United Kingdom. In 2012, he joined the Department of Electrical Engineering at Mahidol University as a lecturer. Currently, he is an Associate Professor in Electronics. He serves as a reviewer for the IEEE Transactions on Circuits and Systems I & II, IEEE Transactions on Biomedical Circuits and Systems, IEEE Transactions on VLSI Systems, and the IEEE Sensors Journal. In 2018, he was a Research Fellow at National Tsing Hua University, Hsinchu, Taiwan. Additionally, he served as a Tutorial Co-Chair for the 2019 IEEE Asia-Pacific Conference on Circuits and Systems.
Address:Montreal, Canada