FET100 and Golden Jubliee Celebration of IEEE Delhi Section: Nanoelectronics and Nanosystems Device Engineering for Sustainability, in the Energy and Variability Efficiency(E.V.E.) Era

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You are all invited to register and attend the Technical Talks being organized by IEEE Electron Device Society (EDS) Delhi Chapter – India and IEEE EDS Community Engagement Ad-hoc Committee alongwith The National Academy of Sciences India-Delhi Chapter; Science Foundation Committee of Deen Dayal Upadhyaya College, University of Delhi, New Delhi, INDIA
 
Kindly register for each talk separately and forward the email to your students and other colleagues.
 
July 2, 2025 @ 4:00 pm Italy time (GMT +2) i.e. 07:30 PM Indian Standard Time (GMT +5:30)
Nanoelectronics and Nanosystems Device Engineering for Sustainability, in the Energy and Variability Efficiency(E.V.E.) Era
Simon Deleonibus, Life Fellow IEEE, Emeritus Fellow Electrochemical Society, Alternatives, Laboratoire d’Electronique et des Technologies de l’Information,(CEA-LETI), Grenoble, France.

Abstract— The design of technologies and architectures of future integrated circuits will be driven by drastic power consumption reduction. They will request less energy greedy devices and interconnect systems. The electronic market will continue its growth thanks to the availability and feasibility of autonomous and mobile systems appealing to societal needs. The increasing complexity of high volume fabricated systems will be possible if we aim at zero intrinsic variability, and generalize 3-dimensional integration of hybrid, heterogeneous technologies at the device, functional and system levels. Weighing on the world energy saving balance will be possible and realistic by maximizing the energy efficiency of co-integrated Low Power and High Performance Logic, Memory devices and Nanosystems to serve data computing and storage, functional diversification and communication.  Thanks to the new technological opportunities, alternative neuromorphic and quantum based computing, are showing up. Increased and complex interactivity will be available at the human/machine interfaces(hardware and software). The future of Nanoelectronics will face the major concerns of being Energy and Variability Efficient(E.V.E.). Sustainability will drive research and development for the sake of resources saving and to limit their ecological footprint, as well.

 


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  • Co-sponsored by Deen Dayal Upadhyaya College, University of Delhi, New Delhi 110078

  Speakers

Simon Deleonibus

Topic:

Nanoelectronics and Nanosystems Device Engineering for Sustainability, in the Energy and Variability Efficiency(E.V.E.)

Abstract— The design of technologies and architectures of future integrated circuits will be driven by drastic power consumption reduction. They will request less energy greedy devices and interconnect systems. The electronic market will continue its growth thanks to the availability and feasibility of autonomous and mobile systems appealing to societal needs. The increasing complexity of high volume fabricated systems will be possible if we aim at zero intrinsic variability, and generalize 3-dimensional integration of hybrid, heterogeneous technologies at the device, functional and system levels. Weighing on the world energy saving balance will be possible and realistic by maximizing the energy efficiency of co-integrated Low Power and High Performance Logic, Memory devices and Nanosystems to serve data computing and storage, functional diversification and communication.  Thanks to the new technological opportunities, alternative neuromorphic and quantum based computing, are showing up. Increased and complex interactivity will be available at the human/machine interfaces(hardware and software). The future of Nanoelectronics will face the major concerns of being Energy and Variability Efficient(E.V.E.). Sustainability will drive research and development for the sake of resources saving and to limit their ecological footprint, as well.

Biography:

Simon Deleonibus, retired from CEA-LETI (2016) as Chief Scientist of Research on Micro Nanoelectronics Devices Technologies and Architectures. Before joining CEA-LETI in 1986, he was with Thomson Semiconductors(1981-1986), where he developed and transferred to production advanced microelectronics devices and products. He gained his PhD in Applied Physics from Paris University(1982). He is Visiting Professor at Tokyo Institute of Technology(Tokyo, Japan), National Chiao Tung University(Hsinchu, Taiwan) and Chinese Academy of Science(Beijing, PRC). He is distinguished CEA Research Director, IEEE Distinguished Lecturer, Life Fellow of the IEEE, Emeritus Fellow of the Electrochemical Society. He was awarded the titles of Chevalier de l’Ordre National du Mérite(2004) and Chevalier de l’Ordre des Palmes Académiques(2011), the 2005 Grand Prix de l’Académie des Technologies, the 2022 IEEE Cledo Brunetti Award. He was member of the ITRS since1998, the European Research Council Panel since 2007, the Nanosciences Foundation Board of Trustees since 2007. He was Associate Editor of IEEE Trans. On Elect. Dev.(2008-2014) and Member of the IEEE Electron Devices Society Board of Governors(01/2009-12/2014) and reelected(2016-2018) ; Chair of IEEE EDS Region 8 SRC (2015-2016) ; Secretary of IEEE Electron Devices Society (2016-2017). He is invited editor by Pan Stanford and Jenny Stanford Publishing since 2008.

Address:France