Verilog to Digital Chip - An Introduction
IEEE SEM Life Member Affinity Group
There is an increase of interest in designing and development of chip manufacturing in the entire world. In this talk, we present some steps of designing basic digital chips from Verilog. We consider elementary Boolean gates and circuits and give the design steps so that the chips can be made using the open-source Tiny Tapeout procedure. All the steps will be discussed so that beginners can easily copy-paste the steps and code and verify the procedure. The talk will also be useful for professionals in this area.
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Ihfaz Islam
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3134667988
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Dr. Harpreet Singh of Wayne State University
Verilog to Digital Chip - An Introduction
Biography:
Dr. Singh (M’73, SM’85, LSM’2009) received his B.Sc. Eng. degree from Punjabi University, India, in 1963 and his M.S. and Ph.D. degrees from the University of Roorkee, India, in 1966 and 1971. He taught at the University of Roorkee from 1963 to 1981. Since 1981 he has been with Wayne State University, Detroit, MI, where he has been a professor in the Department of Electrical and Computer Engineering.
He has worked in diversified areas of systems, networks, controls, fuzzy logic, DNA Nano-digital circuits, bio-circuits and VLSI design. Dr. Singh has about 400 publications in international journals and conferences and has received a number of awards. He has organized a number of national and international conferences and has supervised more than 25 Ph.D. theses in different areas of electrical and computer engineering. He has been awarded the distinguished Alumni Award of prestigious IIT Roorkee in 2012. As a founder and chair of Life Affinity Group of Southeastern Michigan section, the section received the 2017 IEEE Life Member Affinity Group Achievement award.
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Address:5050 Anthony Wayne Drive, , Detroit, Michigan, United States, 48202
Islam of Wayne State University
Verilog to Digital Chip - An Introduction
Biography:
Mr. Islam graduated from Wayne State University Detroit, MI in August 2025 with a B.Sc. in electrical and computer engineering. He has done research in VLSI chip design and has presented at national conferences. His interests are in VLSI chip design, FPGA/ASIC design, open-source silicon design, AI, and machine learning.
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Address:Detroit, Michigan, United States
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IEEE SEM
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Verilog to Digital Chip PowerPoint Presentation | Please find the presentation slides with links attached. | 1.90 MiB |