Simple and Effective New Methodologies for in-vivo and in-vitro Neural Interface Circuits
It has been a long-standing goal to create a large-scale, high-density, wide-bandwidth, and precise neural interface system to monitor electrophysiological signals generated by massive numbers of neurons for a comprehensive understanding of the operation of individual neurons and their interconnections with spatiotemporal oversampling. Despite significant advancements in the past decade, various challenges have hindered the optimal performance of neural interface circuits, including the need for large time-constant circuits, complex interconnection requirements, and efficient power and data telemetry methods. In this presentation, we will explore simple but effective circuit and system solutions that address these challenges.
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- University College London
- Torrington Place
- London, England
- United Kingdom WC1E 7JE
- Building: Roberts Building
- Room Number: 421
- Starts 07 July 2025 10:10 AM UTC
- Ends 14 July 2025 10:30 AM UTC
- No Admission Charge
Speakers
Taekwang Jang of ETH Zürich
Biography:
Taekwang Jang (S’06-M’13-SM’19) received his B.S. and M.S. in electrical engineering from KAIST, Korea, in 2006 and 2008, respectively. From 2008 to 2013, he worked at Samsung Electronics Company Ltd., Yongin, Korea, focusing on mixed-signal circuit design, including analog and all-digital phase-locked loops for communication systems and mobile processors. In 2017, he received his Ph.D. from the University of Michigan and worked as a post-doctoral research fellow at the same institution. In 2018, he joined ETH Zürich and currently works as an associate professor, leading the Energy-Efficient Circuits and Intelligent Systems group. He is also a member of the Competence Center for Rehabilitation Engineering and Science, and the chair of the IEEE Solid-State Circuits Society, Switzerland chapter.
His research focuses on circuits and systems for highly energy-constrained applications such as wireless sensor nodes and biomedical interfaces. Essential building blocks such as a sensor interface, energy harvester, power converter, communication transceiver, frequency synthesizer, and data converters are his primary interests. He holds 15 patents and has (co)authored more than 90 peer-reviewed conferences and journal articles. He is the recipient of the 2024 IEEE Solid-State Circuits Society New Frontier Award, the SNSF Starting Grant, the IEEE ISSCC 2021 and 2022 Jan Van Vessem Award for Outstanding European Paper, the IEEE ISSCC 2022 Outstanding Forum Speaker Award, and the 2009 IEEE CAS Guillemin-Cauer Best Paper Award. Since 2022, he has been a TPC member of the IEEE International Solid-State Circuits Conference (ISSCC), IMD Subcommittee, and IEEE Asian Solid-State Circuits Conference (ASSCC), Analog Subcommittee. He also chaired the 2022 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT), Frequency Generation Subcommittee. Since 2023, he has been serving as an Associate Editor for the Journal of Solid-State Circuits (JSSC) and was appointed as a Distinguished Lecturer for the Solid-State Circuits Society in 2024.