Demo Presentation on Implementing AI models on recent FPGA based Accelerators
AMD provides Field Programmable Gate Arrays (FPGAs) and Adaptive SoCs, like the Versal AI Core Series, that integrate AI Engines, Arm processors, and FPGA fabric to accelerate AI workloads at the edge, in the data center, and on select PCs and workstations. Developers use the unified Vitis™ software platform, including the Vitis AI tool suite, to design custom hardware acceleration for AI models, leveraging the FPGAs' inherent flexibility and efficiency for tasks requiring low latency and high performance per watt. In this presentation, an introduction to digital design tool flow will be discussed to complete NN processing on FPGA using Vivado™ Design Suite.
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- Indian Institute of Technology Kharagpur
- Kharagpur, West Bengal
- India 721302
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Dr. Swati Bhardwaj of AMD
Demo Presentation on Implementing AI models on recent FPGA based Accelerators
AMD provides Field Programmable Gate Arrays (FPGAs) and Adaptive SoCs, like the Versal AI Core Series, that integrate AI Engines, Arm processors, and FPGA fabric to accelerate AI workloads at the edge, in the data center, and on select PCs and workstations. Developers use the unified Vitis™ software platform, including the Vitis AI tool suite, to design custom hardware acceleration for AI models, leveraging the FPGAs' inherent flexibility and efficiency for tasks requiring low latency and high performance per watt. In this presentation, an introduction to digital design tool flow will be discussed to complete NN processing on FPGA using Vivado™ Design Suite.
Biography:
Dr. Swati Bhardwaj
Senior Design Engineer, AMD
Email: swati.bhardwaj@amd.com
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