3D Integrated Circuits: Energy Efficiency from Device to System Level

#3d-integrated-circuits #3d-integration #device #energy #energy-efficiency #integrated-circuits #societies #stem
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Evolving intelligent computational systems have already become a backbone, enabling people, societies, and countries to achieve technological prowess. Yet, the fundamental semiconductor building blocks are becoming increasingly expensive and complex to deploy. This talk explores how energy efficiency at the 3D integration and device level in computation achieves system-level benefits.



  Date and Time

  Location

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  Registration



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  • Room No 205 L , Academic Block, Department of ECE, IIIT Naya Raipur
  • Raipur C, Chhattisgarh
  • India 493661

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  • Co-sponsored by IIIT Naya Raipur
  • Starts 03 September 2025 06:30 PM UTC
  • Ends 05 September 2025 02:38 AM UTC
  • No Admission Charge


  Speakers

Topic:

3D Integrated Circuits: Energy Efficiency from Device to System Level

Dr. Abhishek A. Sharma
Director, Logic Technology Development Group, Intel Corporation, USA

Address:India





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