Acceleration of Encryption Algorithms, Elliptic Curve, Pairing, Post Quantum Cryptoalgorithm, and Fully Homomorphic Encryption

#public-key #encryption #circuit #microelectronics #quantum
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Dear IEEE SSCs member,

We will host Prof. Dr. Makoto Ikeda on Monday 15th at the FHNW.

  • IEEE Solid State Circuit Distinguished Lecture Prof. Dr. Makoto Ikeda
  • Title : “Acceleration of Encryption Algorithms, Elliptic Curve, Pairing, Post Quantum Cryptoalgorithm (PQC), and Fully Homomorphic Encryption (FHE)”
  • Monday 15.09.2025
  • 9:00 – 10:00
  • Location FHNW campus Brugg Windisch
  • Building :  1
  • Floor 3
  • Room  : 1.331

 FHNW Campus Brugg-Windisch - Bachelor Studiengang Informatik

 

Abstract : This lecture will cover basics of public-key encryption, and example design optimization of elliptic-curve based encryption algorithm, including pairing operations, and its security measures. Then extend design optimization on lattice-based encryption algorithms including post quantum crypto-algorithm, CRISTALS-Kyber/Dilithium, isogeny based encryption argorithms, and fully homomorphic encryption algorithm.

 


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  • Klosterzelgstrasse 2
  • Brugg, Switzerland
  • Switzerland Windisch
  • Building: Building 1
  • Room Number: 1.331
  • Contact Event Host
  • Starts 09 September 2025 10:00 PM UTC
  • Ends 14 September 2025 07:00 AM UTC
  • No Admission Charge

  Speakers

Makoto Ikeda

Topic:

Acceleration of Encryption Algorithms, Elliptic Curve, Pairing, Post Quantum Cryptoalgorithm (PQC), and Fully Homomorphi

 

This lecture will cover basics of public-key encryption, and example design optimization of elliptic-curve based encryption algorithm, including pairing operations, and its security measures. 

Then extend design optimization on lattice-based encryption algorithms including post quantum crypto-algorithm, CRISTALS-Kyber/Dilithium, isogeny based encryption argorithms, and fully homomorphic encryption algorithm.

Biography:

Makoto Ikeda received the BE, ME, and Ph.D. degrees in electrical engineering from the University of Tokyo, Tokyo, Japan, in 1991, 1993 and 1996, respectively. He joined the University of Tokyo as a research associate, in 1996, and now professor and director of Systems Design Lab(d.lab), the University of Tokyo. At the same time he has been involving the activities of VDEC(VLSI Design and Education Center, the University of Tokyo), to promote VLSI design educations and researches in Japanese academia. He worked for hardware security, asynchronous circuits design, smart image sensor for 3-D range finding, and time-domain signal processing. He has been serving various positions of various international conferences, including ISSCC ITPC Chair(ISSCC 2021), IMMD sub-committee chair (ISSCC 2015-2018), A-SSCC 2015 TPC Chair, VLSI Circuits Symposium PC Chair(2017)&Symposium Chair(2019). He is a senior member of IEEE, IEICE Japan, and a member of IPSJ and ACM.

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