Bin Yu of Zhejiang University

This seminar is divided into two parts: In the first part, some general trends in nanoscale silicon-based CMOS technology will be briefly reviewed. As an example of the successful university-industrial effort to push forward ultra-scaled IC technology, personal research journal on non-conventional transistor structure will be reflected with the focus on FinFET. In the second part of the seminar, the role of emerging nanostructures and nano-devices in the “post-silicon” era will be discussed. Two-dimensional nanomaterials, heterostructures, and devices have received significant interests from academia and industry lab, attributed to their distinctive layered configuration, band structure, and quantum phenomena. The atomically-thin sheets could be potentially prepared by the conventional thin-film growth techniques. While graphene has been explored as both active and passive elements in future-generation electronics, its gap-less nature implies fundamental limits that promote device innovations. This seminar will introduce recent research progress in my lab in the prototype demonstrations of logic devices, non-volatile memories, on-chip interconnects, nanosensors, and emerging neuromorphic devices on two-dimensional nanostructures and heterostructures. Major challenges and near-future research opportunities will be also highlighted. 

Biography:

Prof. Yu is Distinguished Chair Professor at Zhejiang University. He received M.S. and Ph.D. degrees in Electrical Engineering from University of California at Berkeley. His present research is in the field of nanoelectronics. Specific interests include neuromorphic computing, post-Moore information devices, nanosensors, two-dimensional materials/devices, and other emerging technology. He has authored/co-authored 7 books/book chapters and more than 280 research papers including those published at top journals such as Nature Electronics, Nature Communications, Science Advances, Cell/Matter, Cell/Innovation,  Chemical Reviews, Advanced Materials, ACS Nano, Nano Letters, and top international conferences such as IEDM and VLSI Symposium. He was the speaker of more than 180 invited talks to international conferences, academia, and industry around the world. Dr. Yu served as Consulting Professor of Electrical Engineering at Stanford University, Draft Committee of International Technology Roadmaps for Semiconductors (ITRS), and on the invited panels and advisory/organizing committees of over 50 international conferences. He was/is Editor of IEEE Electron Device Letters, Associated Editor of IEEE Trans. on Nanotechnology, Editorial Board Member of Nano-Micro Letters, and Guest Editor of IEEE Trans on Electron Devices. Dr Yu is Fellow of National Academy of Inventors, Fellow of IEEE, and IEEE Distinguished Lecturer of Electron Devices Society. In his early career in Silicon Valley, he made a number of world records in ultra-scaled CMOS transistors, including the first 10nm FinFET (FinFET is the mainstream technology for global chip industry today).