AP-S YP Lecturer Program on Tiny Antennas, Big Impact Challenges & Innovations in On-Chip Antenna Design
IEEE MTT-S/AP-S/EMC-S Joint Chapter Hyderabad Section organize YP lecturer Program on Tiny Antennas, Big Impact Challenges & Innovations in On-Chip Antenna Design
Speaker: Dr. Arup Ray
Senior Lead Engineer, Wireless Research & Development (RF and Analog)
Qualcomm India Private Limited
Date: 31 January 2026
Time: 6:30–7:30 PM
Platform: Online via Webex
This lecture will explore the evolution of on-chip antennas, key design challenges, and their role in next-generation RF and mmWave systems.
Registration Link: https://forms.gle/kWP9gdK5rkgh6AjM6
Takeaways: Exciting post-lecture quiz with appreciation tokens
Date and Time
Location
Hosts
Registration
-
Add Event to Calendar
Loading virtual attendance info...
Speakers
Arup Ray of Qualcomm India Private Limited
Tiny Antennas, Big Impact Challenges & Innovations in On-Chip Antenna Design
What if the antenna could be as integrated as the transistor? As wireless systems push the boundaries of miniaturization, speed, and integration, the concept of on-chip antennas is rapidly transforming from a niche curiosity to a cornerstone of next-generation RF, microwave, and millimeter-wave technologies.
This talk explores the intriguing world of on-chip antennas—where electromagnetic radiation meets silicon real estate. We delve into the fundamental challenges of antenna miniaturization, substrate losses, and impedance matching, and examine how innovative design strategies are overcoming these barriers. From CMOS-compatible layouts to metamaterial-inspired structures, on-chip antennas are enabling seamless integration of wireless functionality directly into ICs.
Why does this matter? Because the future of high-speed communication, radar sensing, and chip-to-chip wireless interconnects depends on it. Whether it's for 5G/6G transceivers, biomedical implants, or terahertz imaging systems, on-chip antennas are poised to unlock new possibilities across the RF, microwave, and millimeter-wave spectrum.
Join me as we walk through the milestones of on-chip antenna development and ask: Can antennas truly become native to silicon? And if so, what new frontiers will that open?
This talk will cover:
· Fundamentals of on‑chip antenna physics
· Key challenges (efficiency, isolation, substrate effects, EM compatibility)
· Design trade‑offs in advanced CMOS nodes
· Co‑design strategies with RF front‑end circuits
· Emerging applications in 5G/6G, IoT, and miniaturized sensing systems
Biography:
Arup Ray (Member, IEEE) received the B. Tech. and M. Tech. degrees from the University of Kalyani, India. He earned his Ph.D. degree in 2022 from the Indian Institute of Technology (IIT) Kharagpur, India. His dissertation focused on the design methodologies and integration challenges of CMOS on-chip antennas with RF front-end circuits. Later, in 2022, Dr. Ray joined Qualcomm India Private Limited, Bangalore, as a Senior Engineer. He is currently working as a Senior Lead Engineer in the RFIC team. He has contributed to three novel ideas, which have been filed as US-patent applications.
Dr. Ray is a corporate member of the IEEE and the Institution of Engineers (India). He has been actively involved in IEEE activities, having served as Chair of the IEEE AP-MTTS Student Branch Chapter at IIT Kharagpur. He has authored or co-authored nine journal papers and three conference papers. He serves as a peer reviewer for journals, including IEEE Antennas and Wireless Propagation Letters, Springer Scientific Reports, IETE Journal of Research, and IET Microwaves, Antennas & Propagation. He is currently serving as an IEEE Young-Professional Ambassador for IEEE Antenna Propagation Society.
Email:
Address:Senior Lead Engineer, Wireless Research & Development (RF and Analog) , Qualcomm India Private Limited, Bangalore, Karnataka, India
Agenda
- Welcome Address
- Introductions
- Talk
- Q & A
- Felicitation (e-memento)
- Vote of thanks