Chapter Open House and talk on AI Infrastructure
Join us for a talk on how SmartNICs and RDMA Power AI in the Cloud, and get insights into the state of the Chapter.
Training modern Large Language Models (LLMs) requires tens of thousands of GPUs acting as a single "AI Supercomputer." To build this "AI Hypercomputer," we must first address the CPU bottlenecks of traditional general-purpose networking. This talk begins by analyzing why standard TCP/IP processing limits Model Training performance and introduces the concept of "Kernel Bypass" and the role of SmartNICs in offloading network processing from the host CPU. We will explore why modern AI clusters have moved toward hardware offloads (like RDMA) to achieve the high throughput and low latency required for GPU-to-GPU communication. We will also discuss the specific challenges of running lossless transport protocols over lossy Ethernet, where congestion and packet drops can cause severe performance degradation ("tail latency") in large-scale training jobs. The session concludes by analyzing the architectural design patterns required to optimize flow control and ensure reliable delivery in massive AI infrastructure environments.
This event features a leading industry expert from Google addressing this important topic, followed by updates on the state of our chapter from the IEEE CIS SCV Chair.
🎤 Talk 1
The Infrastructure of AI: How SmartNICs and RDMA Power the Cloud
Speaker: Sujithra Periasamy, Google
🎤 Talk 2
State of the Chapter
Speaker: Dr. Vishnu S. Pendyala, Chair, IEEE CIS Santa Clara Valley Chapter
Date and Time
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- Dr. Martin Luther King, Jr. Library (SJSU)
- 150 E San Fernando St San Jose, California 95112
- San Jose, California
- United States
- Room Number: MLK Room 225
- Click here for Map
- Contact Event Hosts
- Co-sponsored by Vishnu S. Pendyala, San Jose State University
Speakers
Sujithra Periasamy
The Infrastructure of AI: How SmartNICs and RDMA Power the Cloud
Biography:
Sujithra Periasamy is a Senior Software Engineer and Tech Lead in Google's Core Infrastructure team, where she architects next-generation networking solutions for hyperscale AI and ML clusters. Her work sits at the intersection of hardware and software, focusing on offloaded networking and transport protocols (SmartNICs). With a strong foundation in cloud computing and Kubernetes orchestration, Sujithra brings a holistic view to infrastructure design. She leverages this expertise to build high-performance network fabrics that eliminate bottlenecks for massive, containerized distributed systems. She is an IEEE Senior Member, and her active research areas include high-performance datacenter networking, RDMA transport, and kernel-bypass architectures.
Dr. Vishnu S Pendyala of San Jose State University
State of the Chapter
Biography:
Vishnu S. Pendyala, Ph.D., is a faculty member in Applied Data Science and a University Senator with San Jose State University, current chair of the Santa Clara Valley Chapter of IEEE Computational Intelligence Society, Coordinator for Regions 5&6, and a Distinguished Contributor of the IEEE Computer Society. Under his leadership for 4 years as the Chair, the IEEE Computer Society SCV Chapter received the Global Outstanding Chapter for 2024. He also taught at Kyungpook National University (ranked #698 in Best Global Universities), South Korea, as a visiting scholar. As a past ACM Distinguished Speaker, researcher, and industry expert, he gave more than 100 talks and tutorial sessions in various forums such as faculty development programs, the 12th IEEE GHTC, IEEE ANTS, 12th IACC, 10th ICMC, IUCEE, 12th ACM IKDD CODS and 30th COMAD, ACM COMPUTE to audiences at venues such as Stanford University, Google, University of Wisconsin (Madison), University of Greater Manchester, University of Hawaii, Computer History Museum, Universidad de Ingeniería y Tecnología, Lima, Peru, IIT Ropar, IIIT Hyderabad, KREA, IIT Jodhpur, University of Hyderabad, IIT Indore, IIIT Bhubaneswar. Some of these talks are available on YouTube and IEEE.tv.
Dr. Pendyala is a senior member of the IEEE and ACM. He has over two decades of experience in the software industry in Silicon Valley, USA and more than 50 publications to his credit. His book, “Veracity of Big Data,” is available in several libraries, including those of MIT, Stanford, CMU, the US Congress and internationally. A few other books on AI/ML and software development that he edited are also well-received and have been included in the US Library of Congress and other reputed libraries. Dr. Pendyala taught a one-week course sponsored by the Ministry of Human Resource Development (MHRD), Government of India, under the GIAN program in 2017 to Computer Science faculty from all over the country and delivered the keynote in a similar program sponsored by AICTE, Government of India, in 2022. Dr. Pendyala served on the US government's National Science Foundation (NSF) proposal review panel in 2023 and the Canadian government’s Natural Sciences and Engineering Research Council (NSERC) in 2025 / 2026. He received the Ramanujan Memorial Gold Medal and a shield for his college at the State Math Olympiad. He also played an active role in the Computer Society of India and was the Program Secretary for its annual national convention. He has traveled widely, covering 23 countries and most states in the US and India.
Address:One Washington Sq, San Jose State University, San Jose, United States, 95192-0250
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