Prof. Madhavan Swaminathan of The Pennsylvania State University

Moore’s law has helped us for 5+ decades through monolithic integration with packaging taking a back seat. We have now reached a stage in the semiconductor industry where advanced packaging is beginning to take the front seat, with billions of dollars being invested in it. Does this mean the end of Moore’s law? So, what has changed for packaging to take center stage? Is Heterogeneous Integration (HI) the same as what was practiced in the past? Why is AI a key driver for HI and how can HI help AI? Can HI be used to continue Moore's law?

This talk will address several of these issues in the context of emerging applications and systems. Ongoing research will be discussed during this presentation.

Dr. Takashi Nishiyama of SHINKO ELECTRIC INDUSTRIES CO., LTD.

Recently, heterogeneous integration has gained significant attention, and UCIe 3.0, the latest industry standard for chiplet systems incorporating 3D packaging technologies, has been released. Our research focuses on advanced packaging solutions using organic materials, including 2.1D and 2.3D interposer structures (i-THOP®) and optoelectronic integrated packages. In this presentation, we will focus on our efforts in developing insulating material processes for 2.xD advanced packages

Mr. Natsuki Toda of Resonac Corporation

With the continuous advancement of electronic devices, the demand for high-density interconnection technologies has intensified, driving the development of implementation solutions such as 2.xD packages employing interposers. Fine-pitch wiring on interposers necessitates the use of high-resolution photoresists, with liquid resists currently dominating due to their superior resolution. In contrast, dry film resists offer notable advantages, including high compatibility with panel-level processes, cost-effectiveness, and ease of handling; however, their relatively limited resolution has constrained their applicability to fine wiring fabrication. In this work, we present the development of a high-resolution dry film resist capable of forming copper wiring patterns with line/space of ≤1.5/1.5 µm, meeting the stringent requirements for advanced interposer applications. Key technological approaches for resolution enhancement are described, and the performance of the developed film is evaluated through fine wiring formation on large-scale panels.

Dr. Hitoshi Araki of Toray Industries, Inc.

With the advent of the era of high‑speed communication and artificial intelligence, the performance requirements for semiconductors have increased dramatically. At the same time, semiconductor packaging is expected to provide higher functionality, higher density, and lower transmission loss. The authors developed a low‑dielectric‑loss photodefinable polyimide for the low insertion loss of high‑frequency devices. In this presentation, I will introduce these achievements. Hybrid bonding (HB) is a technology that promises both high density and low power consumption without the use of solder. We are developing polymer HB using polyimide as an insulating material to improve yield and reliability in HB. I will introduce the status of this development.