IEEE EPS & CEDA Joint Chapter Inauguration Ceremony at GITAM Bangalore

#electronic-packaging#CEDA#GITAMBengaluru #design-automation #ic-design
Share

The IEEE Student Branch, GITAM Deemed to be University, Bengaluru, cordially invites you to the Inauguration of the IEEE CEDA-EPS Joint Student Branch Chapter, established under the banner of IEEE Bengalore Section.

This inauguration marks a significant milestone in strengthening student-led professional activities and advancing competencies in VLSI design, electronic design automation, semiconductor devices, and advanced electronic packaging technologies, aligned with IEEE's mission of advancing technology for humanity.

The ceremony will be inaugurated in the gracious presence of: Dr. Nikita Ambasana Customer Success Manager, SimYog Technology, as the Chief Guest 

The event will be graced by the presence of the following dignitaries: 

·        Prof. Basavaraj G Katageri — Pro Vice-Chancellor

·        Prof. Kishor Budda — Director, GITAM School of Core Engineering

·        Dr. Prithvi Sekhar Pagala — Head of the Department, Department of EECE, GITAM School of Core Engineering 

Venue: SB301, Seminar Hall Department of EECE GITAM Deemed to be University, Bengaluru

Date & Time: 20th January 2026, 9:00 AM onwards

Faculty members, IEEE office bearers, and student representatives will also be part of this memorable event celebrating collaboration, leadership, and technological advancement. 

We warmly invite you to join us and be part of this landmark occasion. 

 


  Date and Time

  Location

  Hosts

  Registration


  • Add_To_Calendar_icon Add Event to Calendar
  • Department of EECE
  • GITAM School of Core Engineeing
  • Doddabalapura, Karnataka
  • India 561203
  • Building: Shivaji Bhavan
  • Room Number: SB301
  • Contact Event Hosts
  • Starts 31 December 2025 06:30 PM UTC
  • Ends 16 January 2026 06:30 PM UTC
  • No Admission Charge

  Speakers

Dr. Nikita Ambasana of Simyog Technology Pvt. Ltd.

Topic:

Electronics Pakaging and IEEE EPS for Students

Biography:

Dr. Ambasana is a semiconductor and EDA industry professional with over a decade of experience spanning advanced research, product engineering, and customer enablement. She holds a PhD from the Indian Institute of Science, Bengaluru, with earlier degrees from DDIT, Nadiad, and DA-IICT, Gandhinagar. Her research, published in leading IEEE journals, focuses on applying machine learning to signal and power integrity, EMC prediction, and high-speed channel design.
 
She has previously worked at Intel India as a Silicon Packaging Engineer, where she contributed to high-speed channel modeling and holds patents in EMC and wireless communication. Currently, she is a Senior Manager for Customer Success at SimYog, working closely with global engineering teams to translate cutting-edge EDA tools into robust, real-world semiconductor designs.
 
In her free time she writes fiction and enjoys trekking and cycling. She runs a non-profit library and a community center in her home town called ThinkSpace Jamnagar and believes that giving back to society is an important aspect of living a fuller life.
 

Email:

Address: SimYog Technologies, Bengaluru, Bengaluru, India, 560001




Agenda


  Media

IEEE CEDA EPS JSBC GITAM BLR Inauguration 721.58 KiB
Photos 2.28 MiB
Report 364.28 KiB