The indispensable role of Pre-Silicon ASIC Validation
Join us to explore the world of Pre-Silicon ASIC Validation (also known as Functional or Design Verification), which plays a pivotal role in delivering functional silicon at IP and SoC levels—powering the experiences, products, and services we rely on today.
You will gain insight into the goals and challenges of validation, potential career paths, and the opportunities for innovation in this field. As yesterday’s SoCs—complete with digital, analog, CPU subsystems, and software—evolve into today’s IP blocks, you’ll learn how validation methodologies and tools have scaled to meet these massive technical hurdles.
Beyond high-level strategy, you’ll walk away with a functional understanding of a UVM (Universal Verification Methodology) environment—the industry mainstay for simulation—and the tool automation used to navigate vast validation spaces. A brief demonstration will showcase how constrained-random techniques generate stimulus to exercise a design, exposing bugs that engineers often never imagined existed.
Audience questions and interaction during and after the talk are enthusiastically encouraged!
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- 245 Church Street
- Toronto, Ontario
- Canada M5B 2K3
- Building: ENG
- Room Number: 460
- Starts 08 March 2026 05:00 AM UTC
- Ends 02 April 2026 04:00 AM UTC
- No Admission Charge
Speakers
The indispensable role of Pre-Silicon ASIC Validation
Biography:
Dean D’Mello is a retired SoC Development Engineer passionate about sharing his knowledge and experience to support the career development of the next generation of engineers.
He has navigated a "squiggly" career spanning Manufacturing, ASIC and IP Architecture, Design, and Validation, as well as Electronic Design Automation (EDA). Dean has held leadership and technical roles at IBM, LSI Logic, Cadence, Qualcomm, Aquantia, and Intel, as well as at a few startups. Prior to his retirement in late 2024, he served as a Principal Engineer at Intel, where he focused on the validation of High-Speed Mixed-Signal SERDES IP used in 5G and FPGA SoCs.
Dean is a member of the IEEE and holds BASc and MASc degrees in Electrical Engineering from the University of Toronto.