Dr. Baris Kazar

Abstract

As deep learning models scale into multi-billion parameter spaces, modern enterprise architectures face an immediate barrier: the memory bandwidth wall. Standard operator execution patterns bot- tleneck high-performance systems by forcing intermediate tensor states to repeatedly cycle through high-bandwidth memory (HBM). This lecture addresses the mathematical and hardware codesign patterns required to achieve sublinear search mandates and drive maximum runtime execution throughput across real-time, multi-modal environments. Through a deep dive into PyTorch implementation mechanics, we examine the dual paradigms of data vs. compute vectorization. We analyze how transforming unstructured real-world entities into continuous, high-dimensional dense numeric representations provides critical topological con- text for downstream similarity checks. Moving past standard eager-mode execution patterns, we demonstrate how custom OpenAI Triton and CUDA fused memory kernels mathematically com- bine scale, mask, and softmax routines into localized execution blocks inside fast SRAM registers, bypassing HBM (High Bandwidth Memory) latency loops completely. Furthermore, this session explores advanced index topologies|speci cally Hierarchical Navi- gable Small Worlds (HNSW) coupled with Vector Quantization (VQ) boundaries. By applying Vector Quantization to compress vast  oating-point vector spaces into low-bit indices, we illustrate how to bridge the gap between continuous neural state spaces and discrete tool selection loops. Finally, we synthesize these optimization mechanics within the framework of Agentic AI control loops (ReAct- Reasoning and Acting), providing a uni ed approach to cognitive scaling, multi-agent synchronization, and real-world hallucination mitigation.

Biography:

Short Bio

Speaker Biography Baris Kazar, Ph.D., M.Sc. is a Senior IEEE Member, Infrastructure Architect, and Spatial Data Scientist with over 20 years of technical leadership bridging high-performance data engineering with enterprise cloud ecosystems. Formerly a Principal Member of the Technical Sta  within Or- acle America Inc.'s Spatial and Graph Group, Dr. Kazar spearheaded the target-state design and engineering implementation of worldwide enterprise location services, multi-tier database indexing architectures, and sub-millisecond geocoding layout heuristics. He is a primary inventor holding 1 multiple core foundational US (4) patents in three-dimensional spatial engine designs, surface val- idation algorithms, and dense semantic tokenization frameworks. Dr. Kazar's pioneering algorithmic research includes the development of the *NORTHSTAR* parameter estimation method for large-scale spatial autoregression model optimization (AHPCRC), built explicitly to optimize large-scale prediction models for bird nest spatiotemporal telemetry distributions, as well as early rule-based digital signal processing (DSP) implementations for cardiac heart rate variability analysis at Guidant Corporation (Boston Scienti c). He currently serves as a Pilot Ambassador for the IEEE Signal Processing Society (2025{2026), IEEE New Hampshire Section MTTS/AP Society Chair, Com/Sig Chair, and is the Founder of the IEEE New Hampshire Local AI Chapter. Dr. Kazar earned his M.S. and Ph.D. in Electrical and Computer Engineering from the University of Minnesota, Twin Cities, specializing in high-performance parallel computing formulations for planetary-scale datasets. Baris has authored many papers and serves in many conference program committees. He is preparing with his colleagues a new AI Workshop that will be hosted at the SNHU at a later date.