Domain Specific Accelerator (DSA) Architectures for Signal Processing, Communications, and Machine Learning

#hardware-accelerators #signal-processing #aiml #communication #processors #machine-learning #cas
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  • Starts 10 October 2026 04:00 PM UTC
  • Ends 15 October 2026 06:00 PM UTC
  • No Admission Charge


  Speakers

Dr. Gunnam

Topic:

Domain Specific Accelerator (DSA) Architectures for Signal Processing, Communications, and Machine Learning

This tutorial will explore Domain Specific Accelerator (DSA) architectures, which are specialized hardware accelerators designed for specific application domains such as signal processing, communications, and machine learning. As the demand for high-performance and energy-efficient systems grows, DSAs offer a promising solution by providing tailored hardware solutions that outperform general-purpose processors in specific tasks. The tutorial will cover the fundamental principles of DSA design, including architecture, optimization techniques, and practical applications. Special emphasis will be placed on the latest advancements in Al, generative Al, and Large Language Models (LLMs). Attendees will gain insights into the design and implementation of these accelerators for various applications.

Biography:

Dr. Kiran Gunnam is an innovative technology leader. His breakthrough contributions are in advanced error correction systems, storage-class memory systems, and computer vision-based localization and navigation systems. He has 100+ issued US patents and 100+ patent applications and invention disclosures, and is the lead or sole inventor for 90% of them. As of 2020, his patented work had been incorporated in more than 3 billion data storage, Wi-Fi, and 5G chips. His inventions on SLAM and 3D CNN are commercialized for LiDAR + camera-based perception for autonomous driving and robotic systems. Dr. Gunnam is the Chair of the IEEE P3109 Standards Working Group for Arithmetic for Machine Learning and was the Founding Chair of the IEEE CASS Standard Activities Subdivision. He has served as an TEEE Distinguished Speaker and Plenary Speaker for 30+ events and is a recipient of the ValleyML Distinguished Technical Achievement Award.