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Functional Safety of SoCs and AI Hardware
#Reliability
#analysis
#
#On-line
#test
#Fault
#diagnosis
#Pre-silicon
#verification
#post-silicon
#validation
This workshop aims at discussing trends and cutting edge approaches for functional safety of general Systems-on-Chip (SoCs), as well as for Artificial Intelligence (AI) hardware which is an emerging class of SoCs. Nowadays, there are intense efforts in designing specialized AI hardware that are motivated by two objectives, namely AI hardware accelerators and AI edge computing. As AI hardware will play a central role in near future safety-critical applications, such as remote-controlled sensor networks and autonomous vehicles, guaranteeing its functional safety will be one of the key technology enablers.
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- Sorbonne Université, Campus Jussieu, LIP6
- 4 place Jussieu
- PARIS, Ile-de-France
- France 75005
- Building: 25-26
- Room Number: 105
- Contact Event Host
- Co-sponsored by CNRS GDR SoC2
Speakers
Prof. Georges Gielen of KULeuven
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