IEEE CS Webinar: IEEE Oregon Section Technical Seminar - SoC Security Verification: Challenges and Solutions

#Computer #Society #Oregon #Hardware #Security #Validation #CAD #for #Assurance
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Guest Speaker: Dr. Farimah Farahmandi, Assistant Professor, Department of Electrical and Computer Engineering, University of Florida 

Venue: Online

When: Augus 25th 6-7 pm

We hope to have you for another interesting talk by one of the experts that we invite from academia, industry, and government.   

* As this online event is free and open to non-IEEE members, please feel free to share it with your colleagues, students, classmates, etc.

* For the abstract and biography of the speaker, please refer to the speakers section below.

* Please note that you will receive a registration confirmation email after you register for the event and you will receive a separate email containing the invite to the meeting later. You can add the link to the meeting invite to your calendar manually as the calendar invite does not get updated automatically.  


  Date and Time

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  • Date: 25 Aug 2022
  • Time: 06:00 PM to 07:00 PM
  • All times are (UTC-07:00) Pacific Time (US & Canada)
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  • Contact Event Host

  • Sohrab Aftabjahani, PhD

    IEEE Oregon Section Computer Society Chapter Chair

    Senior IEEE Member, Senior ACM Member

    aftabjahani[AT-Sign]ieee.org

  • Starts 22 August 2022 01:00 AM
  • Ends 25 August 2022 05:00 PM
  • All times are (UTC-07:00) Pacific Time (US & Canada)
  • No Admission Charge

  Speakers

Farimah Farahmandi Farimah Farahmandi

Topic:

SoC Security Verification: Challenges and Solutions

Abstract:

Security vulnerabilities in system on chips (SoCs) are due to design mistakes, lack of security understanding, design transformations, various attack surfaces, and malicious intents. Further, existing CAD tools are used in SoC design flows can introduce additional vulnerabilities in the SoCs unintentionally. Not only will these vulnerabilities move from one level of abstraction to another, but unique vulnerabilities can also be introduced during design transformations. In this talk, we will talk about the importance of having automatic CAD solutions to be able to analyze the security of SoCs in a comprehensive manner, at all levels of abstractions, and against all existing threats (e.g., fault-injection, side-channel, and hardware Trojan attacks). CAD tools should be designed in a way that are able to access the security of the design in the pre-silicon stage and suggest possible countermeasures while it is still, possible to modify the design and address the potential vulnerabilities.

Biography:

Dr. Farahmandi is an assistant professor in the Department of Electrical and Computer Engineering (ECE) and the associate director of Edaptive Computing Inc. Transition Center (ECI-TC) at the University of Florida. She received her Ph.D. from the Department of Computer and Information Science and Engineering (CISE) at the University of Florida, 2018.  Her research interests include hardware security verification, formal methods, fault-injection attack analysis, side-channel leakage assessment, information leakage, secure physical design, secure supply chain of microelectronics, and post-silicon validation and debug. Her research has resulted in four books, nine book chapters, and several publications in premier ACM/IEEE journals and conferences. Currently, she is the program chair of IEEE HOST 2023. Her research has been sponsored by SRC, DARPA, AFRL, DoD, Analog Devices, ANSYS, and Cisco. Recently, she has been recognized with 2022 ECE Research Excellence Award.




Brought to you by Computer Society - Oregon Chapter .

* Please contact Sohrab Aftabjahani , IEEE Oregon Computer Society Chapter Chair, if you are interested to serve as an officer for this chapter as a few officer positions are open.