Atom-to-Architecture Co-Design of Next-Generation High-Efficiency Microelectronics through High-Fidelity Device Modeling

#MESCO #CMOS #NCFET
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IEEE North Jersey Section AP/MTT Jt. Chapter Co-Sponsors the TALK: "ISpectro-Temporal Dispersion-Engineered Electromagnetic Metamaterials for Sensing and Communication"


To resolve the ever-growing energy consumption challenge in computing in the new information technology (IT) era, correlated materials such as ferromagnets and multiferroics have been employed in microelectronic devices, providing a promising pathway to develop the next-generation beyond-CMOS microelectronics and bring down the energy dissipation. Device-level simulation tools for these novel materials bridge the gap between atomistic material physics and integrated circuit-level studies, allowing researchers from these two areas to connect through a high-fidelity approach. However, the lack of such modeling tools limits the understanding of beyond-Moore devices and systems and thus adversely affects future advances in microelectronics. In this talk, I will introduce our efforts in implementing device modeling algorithms that fully leverage modern supercomputer architectures. The numerical tools we have developed offer algorithmic flexibility, proven accuracy, portability, and massively GPU-accelerated efficiency far beyond the reach of commercial and other research-grade tools. The software currently encompasses electronic, nanomagnetic, ferroelectric, and nanomechanical capabilities. The established software has been used to design innovative devices, such as compact magnetoelectric spin-orbit logic (MESO) and negative-capacitance field effect transistors (NCFET), and to inspire new devices, such as strain-mediated magnetoelectric antennas. Our future research goal is to innovate in silico the next-generation microelectronics systems by collaboratively developing a co-design ecosystem that can operate at the scale and fidelity that enables scientific discovery. Success in this topic will facilitate researchers with reliable system-level design tool sets and provide a thorough understanding of the underlying physics that enables society to “improvise” new microelectronic architectures, mainly providing a strategy for realizing multiferroic-based microelectronics.

 

 

 

 

 



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  • Ajay Poddar (akpoddar@ieee.org), Edip Niver (edip.niver@njit.edu), (Anisha Apte (anisha_apte@ieee.org)

     

     

     

     

     

     

  • Co-sponsored by IEEE North Jersey Section
  • Starts 01 June 2024 02:00 PM UTC
  • Ends 11 June 2024 04:00 PM UTC
  • No Admission Charge


  Speakers

Zhi (Jackie) Yao, PhD of Berkeley National Laboratory (LBNL)

Topic:

Atom-to-Architecture Co-Design of Next-Generation High-Efficiency Microelectronics through High-Fidelity Device Modeling

To resolve the ever-growing energy consumption challenge in computing in the new information technology (IT) era, correlated materials such as ferromagnets and multiferroics have been employed in microelectronic devices, providing a promising pathway to develop the next-generation beyond-CMOS microelectronics and bring down the energy dissipation. Device-level simulation tools for these novel materials bridge the gap between atomistic material physics and integrated circuit-level studies, allowing researchers from these two areas to connect through a high-fidelity approach. However, the lack of such modeling tools limits the understanding of beyond-Moore devices and systems and thus adversely affects future advances in microelectronics. In this talk, I will introduce our efforts in implementing device modeling algorithms that fully leverage modern supercomputer architectures. The numerical tools we have developed offer algorithmic flexibility, proven accuracy, portability, and massively GPU-accelerated efficiency far beyond the reach of commercial and other research-grade tools. The software currently encompasses electronic, nanomagnetic, ferroelectric, and nanomechanical capabilities. The established software has been used to design innovative devices, such as compact magnetoelectric spin-orbit logic (MESO) and negative-capacitance field effect transistors (NCFET), and to inspire new devices, such as strain-mediated magnetoelectric antennas. Our future research goal is to innovate in silico the next-generation microelectronics systems by collaboratively developing a co-design ecosystem that can operate at the scale and fidelity that enables scientific discovery. Success in this topic will facilitate researchers with reliable system-level design tool sets and provide a thorough understanding of the underlying physics that enables society to “improvise” new microelectronic architectures, mainly providing a strategy for realizing multiferroic-based microelectronics.

 

 

Biography:

Zhi (Jackie) Yao (Member, IEEE) is currently a research scientist in the Computational Research Division of Lawrence Berkeley National Laboratory (LBNL). Prior to this role, she was the 2019 Luis W. Alvarez postdoctoral fellow in the Computing Sciences Area of LBNL. Before joining LBNL in Nov. 2019, she was a postdoctoral researcher in the Electrical and Computer Engineering Department at the University of California, Los Angeles (UCLA) from Jan. 2018 to Sep. 2019. She obtained her M.S. degree in June 2014 and her Ph.D. in December 2017 from the ECE Department at UCLA. She was recognized as the EECS Rising Star in 2019 by UIUC and is the recipient of multiple awards, including the 2023 LBNL Director’s Award for Exceptional Achievement Early Scientific Career, 1st Place in Best Student Paper Competition of the 2017 IEEE International Microwave Symposium (IMS), the 2015 Qualcomm Innovation Fellowship, and the 2014 Best Masters’ Thesis of UCLA ECE. Her research areas include microelectronic device modeling, mesoscopic computational materials, electromagnetism, magnetism, ferroelectric, and multiferroics. She intends to invest her interdisciplinary training to investigate the co-design of novel electronics and how such insights inspire new electronic applications and devices. Personal website: http://go.lbl.gov/jackiezhiyao.

 

 

 

 

 

Address:Computational Research Division of Lawrence, Berkeley National Laboratory (LBNL), United States