CTS EDS Chapter Seminar: ESD-IC Co-Design
An IEEE Electron Devices Society Distinguished Lecture by Prof. Albert Wang, IEEE Fellow
Dept. of ECE, University of California, Riverside
Date and Time
Location
Hosts
Registration
- Date: 18 Aug 2017
- Time: 11:00 PM UTC to 12:30 AM UTC
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- 2706 Montopolis Drive
- Austin, Texas
- United States 78741
- Building: Novati Technologies
- Room Number: San Jacinto Room
- Click here for Map
Speakers
Prof. Albert Wang, IEEE Fellow of Dept. of ECE, University of California, Riverside
ESD-IC Co-Design
ABSTRACT
Electrostatic discharge (EDS) failure is a major IC reliability problem. On-chip ESD protection is required for all ICs. As semiconductor technologies continue to advance to nano nodes, ESD protection design becomes a big IC design challenge. This lecture discusses all aspects of practical ESD protection designs, including ESD fundamentals, ESD protection solutions, mixed-mode ESD simulation-design methods, and ESD-IC co-design techniques. Real-world ESD protection circuit design examples will be discussed
Biography:
BIOGRAPHY
Albert Wang received the BSEE degree from the Tsinghua University and the PhD EE degree from The State University of New York at Buffalo in 1985 and 1996, respectively. He was with the National Semiconductor Corporation before joining the faculty of the Illinois Institute of Technology in 1998. Since 2007, he has been a Professor of Electrical and Computer Engineering at University of California, Riverside, where he is Director for the Laboratory for Integrated Circuits and Systems and Director for the University of California Center for Ubiquitous Communications by Light (UC-Light). His research interests focus on analog/mixed-signal/RF ICs, integrated design-for-reliability, IC CAD and modelling, 3D heterogeneous integration of devices and circuits, emerging nano devices and circuits, and LED-based visible light communications. Wang received the CAREER Award from the National Science Foundation. He is the author for the book “On-Chip ESD Protection for Integrated Circuits” (Kluwer, 2002) and 240+ peer-reviewed papers, and holds thirteen U.S. patents. Wang was Associated Editor for IEEE Transactions on Circuits and Systems I, Editor for IEEE Electron Device Letters, Associate Editor for IEEE Transactions on Circuits and Systems II, Guest Editor-in-Chief for the IEEE Transactions on Electron Devices and Guest Editor for IEEE Journal of Solid-State Circuits. He has been IEEE Distinguished Lecturer for the Electron Devices Society, the Circuits and Systems Society and the Solid-State Circuits Society. He is Jr. Past President (2016-2017) and was President (2014-2015) for IEEE Electron Devices Society. He was Chair for the IEEE CAS Analog Signal Processing Technical Committee (ASPTC). Hewas committee member for the SIA International Technology Roadmap for Semiconductor (ITRS). He is a member for IEEE 5G Initiatives Committee. He was TPC Chair (2015) and General Chair (2016) for IEEE RFIC Symposium. He served as committee member for many IEEE conferences, e.g., EDTM, IEDM, BCTM, ASICON, IRPS, IEDST, ICSICT, CICC, RFIC, APC-CAS, ASP-DAC, ISCAS, IPFA, ICEMAC, NewCAS, ISTC, AP-RASC, MAPE, EDSSC, MIEL, EDTM, etc. He is a Fellow of IEEE and a Fellow of AAAS.
Email:
Address:Dept. of ECE, , University of California, , Riverside, United States, 92521
Prof. Albert Wang, IEEE Fellow of Dept. of ECE, University of California, Riverside
ESD-IC Co-Design
Biography:
Email:
Address:Riverside, United States
Agenda
Larry Larson & Ravi Droopad will give a short welcome and give a few EDS Chapter announcements.
Jeff Wetzel will be our local host, He will give a short welcome & introduction to the facility - then Albert will give his talk.
Jeff has asked "We are a Trusted facility and that requires visitors
to state their citizenship status to gain access to the building; foreign nationals (but not green card
holders) need to show their passports. - - To this end - Please enter your citizenship in the field
labeled "Phone Number" [I tried this - it works fine!]