Steven

Certus supplies the semiconductor industry with leading edge custom and ESD and IO IP, as well as custom Analog design and Standard Cell Libraries.  Stephen will be discussing challenges in ESD and IO cell design and his present engagement with leaders in the industry including TSMC, Global Foundries, Intel and others as well as several other companies in the valley. Technology trends with emphasis on ESD and I/O problems with new technologies and his involvement. Stephen and his team have also graciously volunteered to mentor 2 ASU capstone teams developing a test PCB (KiCad) and bench top tester (USB based) software for a library of IO drivers for a custom chip which his team developed. He will describe his journey and career technical highlights and achievements. He has sponsored and taught many technical seminars on ESD mitigation techniques.

Biography:

Stephen’s Educational background includes Stanford University MSEE Candidate, 2003 - 2005  Brigham Young University BSEE, Electrical Engineering and Mathematics, 2000. His work experience includes several companies in addition to starting Certus semiconductor here in Phoenix who employes 15 engineers across the world.  He is also a member of the IEEE. Stephen’s work experience includes CEO and Founder of SRF Technologies and Certus Semiconductor since 2006. Primary emphasis is as the lead developer of ESD and I/O libraries on several processes.  Prior to Certus, he was a Senior Staff Engineer/ Staff Engineer Intel Corp. for 6 years.  Additional design engineering background include Engineering Design for Mass Spectrometry Systems and Chromatography Instruments.   He is a world-renowned expert in semiconductor ESD issues and mitigation techniques, and the longest serving independent ESD Consultant.  He is also the official Semiconductor ESD consultant for the ESD Association and sits on its Board of Directors.

Address:United States