Edge effects in graphene nanoribbon MOSFETs: an atomistic simulation study

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Title: Edge effects in graphene nanoribbon MOSFETs: an atomistic simulation study



Abstract

Shrinking device sizes and shift towards lower power logic devices have driven the semiconductor research community to explore newer materials and highly confined architectures. Evaluation of such device proposals often requires first-principles simulationsof the underlying physics. To this end, I will briefly delineate the development of a fully three dimensional atomistic quantum transport simulator within a nearest-neighbor tight-binding framework. I will show how band-to-band tunneling increases the leakage current in OFF state in field-effect transistors (FETs)of low band gap semiconductors such as InSb.

I will move on to graphene nanoribbon (GNR) FETs, which are attractive for a wide variety of reasons. However, for logic devices, to maintain a high ON/OFF ratio, extremely narrow ribbons are often proposed to open up band gaps in otherwise gapless graphene monolayers. Using the above simulator, I will illustrate that while band gap does increase as GNR width is decreased, in practicedevices relying on that might show extreme sensitivity to ribbon-edge roughness,leading to performance degradation and device-to-device variability.



Brief biography

Dipanjan Basur eceived his B.E. degree in Electronics and Telecomm. from Jadavpur University in 2001, M.Tech. from EE department, IIT Kanpur in 2005, and Ph.D. from ECE dept. of Univ. of Texas at Austin in 2010. During his Ph. D. he worked on various quantum simulation methods- for transport in confined structures, as well as bulk electronic structure calculations. He focused on graphene as a channel material for logic applications. Under Prof. Allan H. MacDonald's guidance, he exploredelectron-hole condensation between two graphene monolayers separated by thin dielectric, in the limit of weak as well as strong interlayer bare tunneling, all within Hartree-Fock theory. Since 2010, he is with Intel Corporation, where he evaluates various short channel effects and benchmarks performance of InGaAs and Ge MOSFETs. His broad research interests encompass modeling of solid-state electronic devices. Outside of work, he enjoys reading, traveling and photography.

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  • Department of Electrical Engineering
  • Indian Institute of Technology Kanpur
  • Kanpur, Uttar Pradesh
  • India 208016
  • Building: ACES
  • Room Number: DA 229

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  • Co-sponsored by Dr. Kumar Vaibhav Srivastava