From Top Level Design Specifications to Detail Design

#design #specifications #Direct #Digital #Synthesizers
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https://ieee.li/society-chapters/signal-processing-society-sp/


The Long Island (LI) Chapter of IEEE Signal Processing Society (SPS) in collaboration with the Educational Activities Committee of IEEE LI; Renewable Energy and Sustainability Center at Farmingdale State College and IEEE LI Women in Engineering Affinity Group Presents the following Lecture:

From Top Level Design Specifications to Detail Design

This discussion will focus on the process of breaking down top level system specifications into detail design requirements that an individual designer can address. It will talk about the systematic decomposition and allocation processes, from top-level requirements decomposition, to functional identification and allocation, to functional decomposition and finally to the physical allocation to a design entity… be it for microwave, analog, digital, or signal processing hardware, or FPGA or embedded processor code. It will use the introduction of Direct Digital Synthesizers into historically analog equipment as an example of the process. This discussion is appropriate for both practitioners as well as undergraduate Engineering students. 



  Date and Time

  Location

  Hosts

  Registration



  • Date: 29 Mar 2018
  • Time: 11:00 AM to 12:15 PM
  • All times are (UTC-04:00) Eastern Time (US & Canada)
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  • Farmingdale State College
  • 2350 Broadhollow Road
  • Farmingdale, New York
  • United States 11735
  • Building: Lupton Hall
  • Room Number: Room 247
  • Click here for Map

  • Contact Event Host
  • Lecture Coordinators: 

    Professor Issapour, IEEE LI Junior Past Chair 
    Dr. Radu, IEEE LI Section WIE Chair (wie@ieee.li) 
    Dr. Donaldson, Chair, SPS IEEE LI Section (signal@ieee.li) 
    Rhonda Green, Vice Chair, SPS IEEE LI Section (signal@ieee.li)

  • Starts 03 March 2018 05:42 PM
  • Ends 28 March 2018 05:42 PM
  • All times are (UTC-04:00) Eastern Time (US & Canada)
  • No Admission Charge
  • Menu: Free Pizza and water will be served.


  Speakers

Ed Palacio Ed Palacio of P&L Technical Management Solutions

Biography:

Ed Palacio has over 40 years each of experience in directing development and production of complex military electronic systems. He has held P&L responsibility at the Business Unit and Sector levels, as well as functional lead positions in Program Management, Engineering and Operations. Ed is a Principal of P&L Technical Management Solutions, a Small Business focused on technology, program, and business development for the military and civilian market. Ed holds a BEE from the Cooper Union School of Engineering and Science and two MS degrees in Electrical Engineering and Technology Management from the Polytechnic Institute of New York. He is on the Adjunct faculty at the SUNY Stony Brook School of Engineering Department of Technology and Society. In addition, he is the IEEE Region 1 Vice-Chair and Director-Elect. 

Bob Lukachinski Bob Lukachinski of P&L Technical Management Solutions

Biography:

Bob Lukachinski has over 40 years each of experience in directing development and production of complex military electronic systems. He has held P&L responsibility at the Business Unit and Sector levels, as well as functional lead positions in Program Management, Engineering and Operations. Bob is a Principal of P&L Technical Management Solutions, a Small Business focused on technology, program, and business development for the military and civilian market. Bob holds a BE from SUNY Stony Brook, an MS degree in Electrical Engineering from the Polytechnic Institute of New York, and an MBA from Adelphi University. 






https://ieee.li/society-chapters/signal-processing-society-sp/