IEEE SSC EPFL Seminar : Ultra low power circuit designs for miniaturized systems

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The next generation of computing platforms increases proximity to the source of information rather than to humans,  allowing much more aggressive miniaturization. The key technology for miniaturization had been process scaling, which had reduced the silicon area, increased computational capability and lowered power consumption. However, the latest deep-submicron technologies do not fit well with mm-scale computing because of the increased leakage current. Therefore, advances in circuit level techniques are critical to realizing networks of mm-scale IoT computing platforms. Consequently, promising research outcomes have been published in various areas of medical care, environmental monitoring and surveillance. Such wireless sensor nodes require new circuit techniques as they are placed in a very distinct operating environment with specialized purposes compared to conventional applications. Ultra-low power consumption is one of the most challenging constraints resulting from the form factor of the system.

This talk, based on recent publications, introduces circuit techniques for the key building blocks of a miniaturized sensor node such as an ultra-low power timers, energy efficient sensor front-ends, wireless power transfer circuits and a reconfigurable frequency synthesizer.



  Date and Time

  Location

  Contact

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  • Ecole Polytechnique Fédérale de lausanne
  • Batiment MED
  • Lausanne, Switzerland
  • Switzerland CH-1015
  • Building: MED - Auditoir Adrien Palaz
  • Room Number: MED0 1418
  • Click here for Map
  • Starts 02 December 2018 11:00 AM
  • Ends 10 December 2018 10:00 AM
  • All times are Europe/Zurich
  • No Admission Charge
  • Register


  Speakers

Prof. Dr. Taekwang Jang of ETH Zurich

Topic:

Ultra low power circuit designs for miniaturized systems

Biography:

Taekwang Jang is currently an Assistant Professor at the Institute for Integrated Systems at the ETH Zürich, Switzerland.

Taekwang Jang received his B.S. and M.S. in electrical engineering from KAIST, Korea, in 2006 and 2008, respectively.

From 2008 to 2013, he worked at Samsung Electronics Company Ltd., Yongin, Korea, focusing on mixed-signal circuit design including analog and all-digital phase-locked loops for communication systems and mobile processors fabricated in 20-45nm CMOS process.

In 2017, he received his Ph.D. from the University of Michigan; his dissertation was titled “Circuit and System Designs for Millimeter-Scale IoT and Wireless Neural Recording.”

After working as a post-doctoral research fellow at the University of Michigan for one year, he joined the ETH Zürich in 2018 as an assistant professor and is leading the Analog and Mixed-Signal Interface group. His research interests include ultra-low power systems, bio-medical circuits, frequency synthesizers and data converters.

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