Migrating Electronic Systems from Fault Tolerant Computing to Error Resilience
An online fault detection and subsequent error correction becomes necessary on a wide scale. But now the extra power needed for fault tolerant computing becomes a nightmare, since extra power and extra heat promotes aging effects strongly.
First, methods of fault detection and error correction that get along with only a small extra power budget were developed. Unfortunately, they are not as powerful, robust and universally applicable as, for example, triplication plus majority vote (TMR), which consumes more than triple power.
The second approach to the solution is the concept of “error resilience”. It is based on the observation that, depending on function and application of a circuit, a limited number of faults may be acceptable for some time without total system failure. If the overall systems can become aware of its own fault status, acceptance of some faults followed by a process of self-repair by re-organization during a time slot when the system is “at rest” may be a partial solution. Then only those parts of a digital system, where single or multiple bit errors will damage the function directly and critically, will need traditional “fast and hot” methods of error detection and error correction.
Date and Time
Location
Hosts
Registration
-
Add Event to Calendar
- POZNAN UNIVERSITY OF TECHNOLOGY
- UL. JANA PAWŁA II 24
- Poznan, Wielkopolskie
- Poland 60-965
- Building: Centre of Mechatronics, Biomechanics and Nanoengineering
- Room Number: 201
Speakers
Heinrich Theodor Vierhaus
Migrating Electronic Systems from Fault Tolerant Computing to Error Resilience
Biography:
Heinrich Theodor Vierhaus received a diploma in electrical engineering from Ruhr-University Bochum (Germany) in 1975.
Lecturer for RF technology and electronic circuits with Dar-es-Salaam Technical College in Tanzania (East Africa) from 1975 to 1977.
Dr.-Ing. in EE from University of Siegen in 1983.
Senior researcher with GMD, the German National Research Institute for Information Technology from 1983 to 1996.
Professor for “Technische Informatik” (computer engineering) at Brandenburg University of Technology Cottbus since 1996.
He has authored or co-authored about 250 papers in the area of computer engineering, mainly related to IC test, technology, dependability and fault correction. He also contributed to three books in the area as an editor and an author.
Since 2009, he has initiated and coordinated several projects on advanced education of doctoral students in the area of dependable systems, based on an international network of universities and research institutes.
Address:Brandenburg University of Technology , Computer Engineering Group, Cottbus, Germany