Phase Locked Loop Design

#PLL #Microelectronics #IC
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Lectures on Microelectronic Circuits Design.

During this meeting Randy Caplan (CEO, Silicon Creations) will give two talks on Phase Locked Loop (PLL) Design.


  Date and Time

  Location

  Hosts

  Registration


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  • AGH University of Science and Technology
  • Cracow, Malopolskie
  • Poland 30-059
  • Building: B-1
  • Room Number: auditorium 121
  • Contact Event Host

  Speakers

Randy Caplan (Silicon Creations) of Silicon Creations

Topic:

PLL Design

Biography:

Randy Caplan is co-founder and Executive Vice President of Silicon Creations. Since 2006, Randy has helped to grow Silicon Creations into a leading Mixed-Signal IP company with more than 200 customers in over 20 countries. He has helped to develop key technologies for over 400 highly differentiated SerDes and PLL products in process nodes from 5nm to 350nm. Prior to Silicon Creations he held IC Design Engineering positions at Agilent Technologies, Virtual Silicon, and MOSAID. Randy has been granted 3 US patents and holds a BSEE from Georgia Institute of Technology.




Agenda

15:00 - 16:30 - Randy Caplan (Silicon Creations): Phase Locked Loop Design (part 1)
16:30 - 16:45 - Coffee Break
16:45 - 18:30 - Randy Caplan (Silicon Creations): Phase Locked Loop Design (part 2)