8:00 to 8:30 

Registration Breakfast, April 12, 2019

8:30 to 9:30  

Welcome and Plenary Speaker 1, Main Room

Mr. Gustavo Blando, Samtec. Title “Increasing Broadband Interconnect Characterization to 60GHZ ”

Gustavo Blando is a Senior Principle Engineer leading the Principal SI/PI Architect at Samtec Inc. where he's charged with the development of new SI/PI methodologies, high speed characterization, tools and modeling in general.

Abstract:

As we continue to push for higher frequencies, manufacturing tolerances becomes a limiting factor. This is specially true for high-frequency coax launches. Any variation in pad, antipad, drill location and dimension makes a very noticeable difference in frequency and time domain plots. In this study, I’ll go through a debug exercise on a test board to show what to expect for one of this manufacturing variations. Simulations and measurement in the time and frequency domain measurements together with CT scan of boards will be shown to illustrate and connect the fabrication tolerance problem to lab results.

9:40 to 11:10

Workshop 1,  Keysight
(Main Room)

OJ Danzy and Russ Kramer "A Practical Guide to Signal Integrity: From Simulation to Measurement”

Bios:

OJ Danzy is a RF and Microwave Application Engineer at Keysight Technologies specializing in areas surrounding physical layer test, network analysis, test system design and automation. He received BSc in EE from Tennessee State University and a Master of EE from Cornell University.

Bio: Russ Kramer specializes in IC business development at Keysight (Agilent EEsof). He holds a BSc and a master’s degree in EE from Pennsylvania State University (UP) and an MBA from Loyola College (.

11:15 to 12:15 

Plenary Speaker 2

Al Neves, Wildriver Technologies, Title “  Moving Towards 112G PAM-4 Characterization -  Challenges, Crux Issues”

12:15 to 1:10

Lunch Speaker:

Nathan Tracy, TE Connectivity, Title “ 112 Gbps Electrical Interfaces: Does rate drive architecture or does architecture enable rate”

Abstract: As the industry plans it’s move to 112 Gbps, a number of signal integrity challenges must be addressed.  Technology improvements will no doubt be part of the solution, but it is likely that evolving architectures will also be part of the solution.  This presentation will discuss the industry trends driving the need to move forward to 112 Gbps, the electrical channels and electrical architectures anticipated to be part of the 112Gbps components, equipment, and networks, and finally, share some analysis results based on some of these channels.

 Bio: As a technologist on the system architecture team and manager of industry standards for the Data and Devices business unit at TE Connectivity (TE), Nathan is responsible for driving standards activities and working with key customers to enable new system architectures. Nathan has more than 30 years of experience in technology development, marketing and business development for TE.mNathan holds a BSc in  EET from the University of Massachusetts, Dartmouth.

1:15 to 2:15

Plenary Speaker 3

Tracy Vincent, Dassault  Systems, title “Equivalent Capacitance and Multilayer Models for Effective Roughness Dielectric in PCBs with Coupling Study Shown for the Representation of Surface Roughness,”

Abstract:

In this work, the equivalent capacitance approach is used to get the Effective Roughness Dielectric  (ERD) parameters based on the understanding that there is a gradual variation of concentration of metallic inclusions in the transition layer between the dielectric and foil. The metallic concentration profile can be extracted from scanning electron microscopy or high-resolution optical microscopy. The proposed model of equivalent capacitance with gradient dielectric is applied to standard, very-low-profile, and hyper-very-low profile  foils, and the frequency-dependent dielectric parameters of the homogenized ERD are calculated. All the models show excellent agreement with measurements.

Tracey is a support engineer for CST software, Dassault Systemes, Boston. She has a combined Bachelors/Masters Degree in EE from Herriot-Watt University in Edinburgh, Scotland. She also has a Ph.D. in Material Science from WPI in Worcester, MA.

2:30 to 4:00

Workshop 3 (Main Room)

Greg Bonaguide, Rohde & Schwarz USA, Inc.

Title:  Advances in VNA-based Signal Integrity Tools and Techniques.

Abstract:  In this workshop we demonstrate new de-embedding techniques integrated into VNA firmware that make frequency-domain signal integrity measurements easier, more accurate, and less error-prone.  We also present new tools to predict system response to arbitrary time domain signals.  By implementing a "virtual" signal generator for multilevel PAM signals (NRZ,PAM-4, PAM-8, PAM-16), coupled with the impulse response of the measured S-parameters, eye diagrams are produced and updated in real-time.

Bio: Greg Bonaguide is a National Applications Engineer for Rohde & Schwarz, specializing in Spectrum Analyzers and Vector Network Analyzers and focusing on RF & Microwave Component testing.  

Workshop 4

John Smith: Tektronix

Tektronix PAM4 workshop.

Tektronix will be discussing 400G test and measurement challenges. Specifically, we will focus on performing transmitter measurements of PAM4 modulated signals. We will discuss and review some of the pros and cons of using sampling oscilloscopes vs using real time oscilloscopes in making PAM4 measurements in the optical and electrical domains. 

Bio: John Smith is Sr. Applications Engineer at Tektronix, Inc. His primary focus is high speed serial data communications, including direct detect and phase detect communications systems.