Lecture on Discrete-Time Receivers and ADC for the Internet-of-Things
Internet-of-Things (IoT) imposes severe requirements on ultra-low power consumption of radio frequency (RF) transceivers. Battery life is critical in these applications and can be extended by lowering supply voltage to reduce power consumption. In the receiver part of the radio, the analog front-end section is the most power-hungry subsystem and has received a lot of attention lately, mainly from the analog continuous-time point of view. Advances in discrete-time receiver designs, however, offer new alternatives with simpler and technology-scalable switched-capacitor circuits and easy calibration of intermediate frequency and band-pass selection based on capacitor ratios, which are less sensitive to process variations. New passive charge-domain switched-capacitor (SC) filter topologies and accurate control of sampling rates, both of which benefit from technology scaling and enable easier-to-design low-power solutions, have been introduced. Another important aspect is a new capability of achieving analog-to-digital conversion (ADC) using passive SC sigma-delta oversampling techniques. A new architecture was recently proposed and realized in 28nm CMOS. It contains only switches, capacitors and one comparator, thus being greatly amenable to nanoscale CMOS process nodes.
Date and Time
Location
Hosts
Registration
- Date: 03 Dec 2019
- Time: 05:00 PM to 07:00 PM
- All times are (UTC+01:00) Warsaw
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- AGH University of Science and Technology
- Av. Mickiewicza 30
- Krakow, Malopolskie
- Poland 30-059
- Building: B1
- Room Number: H24 (1st floor)
Speakers
prof. Bogdan Staszewski (University College Dublin
Sigma-Delta ADCs
Robert Bogdan Staszewski has completed Technikum Elektryczne in Białystok. He received his B.Sc. (summa cum laude), M.Sc. and Ph.D. degrees, all in Electrical Engineering, from the University of Texas at Dallas, Dallas, USA, in 1991, 1992 and 2002, respectively. From 1991 to 1995, he was with Alcatel Network Systems in Richardson, Texas, USA, working on SONET cross-connect systems for fiber optics communications. He joined Texas Instruments, Dallas, TX, USA, in 1995 where he was elected Distinguished Member of Technical Staff (limited to 2% of technical staff). Between 1995 and 1999, he was engaged in advanced CMOS read channel development for hard disk drives. In 1999, he co-started a Digital RF Processor (DRP) group within Texas Instruments with a mission to invent new digitally intensive approaches to traditional RF functions for integrated radios in deeply-scaled CMOS processes. He was appointed a CTO of the DRP group between 2007 and 2009. In July 2009, he joined Delft University of Technology, Delft, The Netherlands, where he is currently a part-time Full Professor. Since Sept. 2014, he has been a Professor with University College Dublin (UCD), Dublin, Ireland. He has authored and co-authored three books, five book chapters, 210 journal and conference publications, and holds 160 issued US patents. He is an IEEE Fellow and a recipient of IEEE Circuits and Systems Industrial Pioneer Award. In May 2019, he received the title of Professor from the President of the Republic of Poland.