CASS Talks with Luca Benini, ETHZ, Switzerland and Università di Bologna, Italy
Abstract:
Energy efficiency and low-power computing are the critical goals for the current and future generations of computing systems. In this talk I will give a deep dive on how to design energy efficient computing systems leveraging an open-platform approach: from open instruction set architecture (ISA) to open Hardware design. I will move from RISC-V processors, starting from ISA organization, moving to micro-architecture and finally to design and implementation. I will focus on the distinctive advantages offered by RISC-V openness and extensibility across these abstraction layers. I will use the open RISC-V cores from the Parallel Ultra Low Power (PULP) platform as concrete case studies, in single and multi-core configurations, and heterogeneous combinations. I will also discuss opportunities and challenges related to the silicon implementation of RISC-V based academic and commercial Systems-on-Chip and share a vision on future research and development opportunities and challenges on open cores and open (RISC-V) hardware.
Short Bio:
Luca Benini holds the chair of digital Circuits and systems at ETHZ and is Full Professor at the University di Bologna. He received a PhD from Stanford University. He has been visiting professor at Stanford University, IMEC, EPFL, and served as chief architect in STMicroelectronics France. Dr. Benini's research interests are in energy-efficient parallel computing systems, smart sensing micro-systems and machine learning hardware. He has published more than 1000 peer-reviewed papers and five books. He a Fellow of the IEEE, of the ACM and a member of the Academia Europaea. He is the recipient of the 2016 IEEE CAS Mac Van Valkenburg award, the ACM/IEEE A. Richard Newton and the EDAA Achievement awards in 2020.
Date and Time
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- Date: 05 Nov 2021
- Time: 01:30 PM to 03:30 PM
- All times are (UTC-03:00) Brasilia
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