Spintronics - Perspectives and Challenges
Conventional CMOS technology has reached to the brink of its scaling limits and poses significant challenges for the development of next generation high-speed ultra-low power cost-effective memory and processing devices. The failure of Moore's law on the technology roadmap has enforced the research community to explore alternative technology solutions to mitigate the problems.
In the post-CMOS era, spintronics shall emerge as a potentially viable interdisciplinary field with credible technological perspectives. Spintronic exploits an electron’s spin orientation and its associated magnetic moment as a state variable instead of a conventionally used charge in CMOS technology.
In general, the spintronic devices are layered structure of ferromagnetic materials and provide the nonvolatile storage options and manipulations of logic states. Spin transfer torque (STT) and spin orbit torque (SOT) devices using magnetic tunnel junctions (MTJs) have become strong contenders for the nonvolatile embedded memory architectures with the capability of implementing the concepts of "logic-in-memory" and "material-device-circuit co-design." The spin torque devices offer the features of "universal memory" i.e., high speed, nonvolatility, high density, and low power, high endurance, CMOS process compatibility. Apart from the basic spin torque devices, the field of spintronics encloses all spin logic (ASL) devices, domain wall (DW) based devices, spin diodes, and spin FETs. The material and device level roadmaps for the field of spintronics suggest that the research work is at the infant stage and still require different elemental spin device developments with the understanding of associated underlying physics. In addition, the accurate models for the spintronic devices imitating the effect of stochastic behaviour and PVT variations need to be explored. Spintronics based architectures are being considered for computing applications such as bio-inspired computing and quantum computing. These spintronics based novel computing approaches find applications in image processing and provides efficient solution to the complex computing problems.
Date and Time
Location
Hosts
Registration
- Date: 26 Apr 2022
- Time: 12:00 PM to 01:00 PM
- All times are (UTC-04:00) Eastern Time (US & Canada)
-
Add Event to Calendar
- 1000 River Road
- Essex Junction, Vermont
- United States 05452
- Building: 965
- Room Number: Presentation Center
- Starts 18 April 2022 10:04 AM
- Ends 22 April 2022 05:00 PM
- All times are (UTC-04:00) Eastern Time (US & Canada)
- No Admission Charge
Speakers
Dr Brajesh Kaushik
Biography:
Dr. Brajesh Kumar Kaushik (SM'13) received Doctorate of Philosophy (Ph.D.) in 2007 from Indian Institute of Technology, Roorkee, India. He joined Department of Electronics and Communication Engineering, Indian Institute of Technology, Roorkee, as Assistant Professor in December 2009; promoted to Associate Professor in April 2014; and since Aug 2020 he has been serving as full Professor. He had been Visiting Professor at TU-Dortmund, Germany in 2017; McGill University, Canada in 2018 and Liaocheng University, China in 2018. He is currently serving as Visiting Lecturer of SPIE society to deliver lectures in the area of Spintronics and Optics at SPIE chapters located across the world. He regularly serves as General Chair, Technical Chair, and Keynote Speaker of reputed international and national conferences. He also served as Chairman and Vice Chairman of IEEE Roorkee sub-section. Dr. Kaushik is a Senior Member of IEEE and member of many expert committees constituted by government and non-government organizations. He is currently serving as Distinguished Lecturer (DL) of IEEE Electron Devices Society (EDS) to offer EDS Chapters with quality lectures in his research domain. He is Editor-in-Chief of Elsevier Journal, Memories-Materials, Devices, Circuits and Systems; an Editor of IEEE Transactions on Electron Devices; Associate Editor of IEEE Sensors Journal; Associate Editor of IET Circuits, Devices & Systems; Editor of Microelectronics Journal, Elsevier; Editorial Board member of Journal of Engineering, Design and Technology, Emerald and Circuit World, Emerald. He is among top 2% scientists in world as per Stanford University report of 2019. He is currently serving as member of two technical committees namely, Spintronics (TC-5), and Quantum Computing, Neuromorphic Computing and Unconventional Computing (TC-16) of IEEE Nanotechnology Council. He is also Regional coordinator (R10) of IEEE Nanotechnology Council Chapters. He has 12 books to his credit published by reputed publishers such as CRC Press, Springer, Artech and Elsevier. One his books, titled “Nanoscale Devices: Physics, Modeling, and Their Application”, CRC Press won 2018 Outstanding Book and Digital Product Awards in the Reference/Monograph Category from Taylor and Francis Group. He has been offered with fellowships and awards from DAAD, Shastri Indo Canadian Institute (SICI), ASEM Duo, United States-India Educational Foundation (Fulbright-Nehru Academic and Professional Excellence). His research interests are in the areas of high-speed interconnects, carbon nanotube-based designs, organic electronics, device circuit co-design, optics & photonics-based devices, image processing, spintronics-based devices, circuits and computing.
Address:Vermont, United States