Development and Integration Strategies for Non-volatile Resistive Memory in the Context of Neuromorphic Computing and AI Hardware

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Neuromorphic and AI computing hardware is trending away from traditional von Neumann computational architectures. This transition is opening the door to a wide range of novel devices and integration solutions. Over the past 10 years, my research group has focused on fabrication and integration strategies for CMOS-compatible, non-volatile, memory devices (aka: memristors). These memristive devices have the potential to act as neuronal synapses in neural networks, but can also function as tunable elements in array-based accelerators. Introducing unique materials and novel memristive devices into the traditional CMOS fabrication process presents many challenges, from both the process integration and packaging standpoint. In this presentation I will discuss integration strategies that we have used to develop novel hardware solutions and translation of laboratory-scale demonstrations towards integration on 300mm wafer platforms utilizing the Albany Nanotech 300mm foundry.



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  • Date: 23 Jun 2022
  • Time: 12:00 PM to 01:00 PM
  • All times are (UTC-05:00) Eastern Time (US & Canada)
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  • CESTM Audirotium
  • Albany, New York
  • United States
  • Building: CNSE

  • Starts 03 June 2022 12:30 PM
  • Ends 23 June 2022 12:30 PM
  • All times are (UTC-05:00) Eastern Time (US & Canada)
  • No Admission Charge


  Speakers

Dr. Nate Cady of SUNY Polytechnic Institute

Topic:

Development and Integration Strategies for Non-volatile Resistive Memory in the Context of Neuromorphic Computing

Neuromorphic and AI computing hardware is trending away from traditional von Neumann computational architectures. This transition is opening the door to a wide range of novel devices and integration solutions. Over the past 10 years, my research group has focused on fabrication and integration strategies for CMOS-compatible, non-volatile, memory devices (aka: memristors). These memristive devices have the potential to act as neuronal synapses in neural networks, but can also function as tunable elements in array-based accelerators. Introducing unique materials and novel memristive devices into the traditional CMOS fabrication process presents many challenges, from both the process integration and packaging standpoint. In this presentation I will discuss integration strategies that we have used to develop novel hardware solutions and translation of laboratory-scale demonstrations towards integration on 300mm wafer platforms utilizing the Albany Nanotech 300mm foundry.

Biography:

Prof. Cady obtained his BA and Ph.D. from Cornell University in Ithaca, NY. He is currently an Empire Innovation Professor of Nanobioscience in the College of Nanoscale Science & Engineering at SUNY Polytechnic Institute, and is the Interim Vice President of Research. Prof. Cady has active research interests in the development of novel biosensor technologies and biology-inspired nanoelectronics, including hardware for neuromorphic computing. He has published over 150 peer reviewed scientific papers and is an inventor on 11 patents. His research has been supported by the NIH, NSF, AFRL, ARL, DOE, ONR, SRC, as well as multiple industry partners.