Disturbance-Free Built-In Self-Test Techniques for Loop Characterization of DC-DC Converters and LDOs

#power #supply #electronics #load #current #voltage #DC/DC #converter #LDO #feedback #loop #BIST
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The combined Santa Clara Valley, San Francisco, & Oakland/East Bay IEEE PELS is very pleased to have Dr. Bertan Bakkaloglu, the the On Semiconductor Professor in the School of Electrical, Computer and Energy Engineering at Arizona State University, to speak on the topic of “Disturbance-Free BIST Techniques for Loop Characterization of DC-DC Converters and LDOs


Power Management circuits are employed in almost all electronic equipment and they have energy storage elements (capacitors and inductors) as building blocks along with other active circuitry. Power management circuits employ feedback to achieve load and line regulation and the feedback loop is designed at an operating point and component values are chosen to meet that design requirements. However the capacitors and inductors are subject to variations due to temperature, aging and load stress. Due to these variations, the feedback loop can cross its robustness margins and can lead to degraded performance and potential instability. Another issue in power management circuits is the measurement of their frequency response for stability assessment. The standard techniques used in production test environment require expensive measurement equipment (Network Analyzer) and time. These two issues of component variations and frequency response measurement can be addressed if the frequency response of the power converter is used as measure of component (capacitor and inductor) variations.

In this presentation, techniques to track changes in the dynamic loop characteristics of the DC-DC converters without disturbing the normal mode of operation is presented. A digital pseudo-noise (PN) based stimulus is used to excite the DC-DC system at various circuit nodes to calculate the corresponding closed-loop impulse response. The test signal energy is spread over a wide bandwidth and the signal analysis is achieved by correlating the PN input sequence with the disturbed output generated, thereby accumulating the desired behavior over time. A mixed-signal cross-correlation circuit is used to derive on-chip impulse responses, with smaller memory and lower computational requirement in comparison to a digital correlator approach. Model reference based parametric and non-parametric techniques are discussed to analyze the impulse response results in both time and frequency domain. The proposed techniques can extract open-loop phase margin and closed-loop unity-gain frequency within 5.2% and 4.1% error, respectively, for the load current range of 30-200mA. Converter parameters such as natural frequency (ωn), quality factor (Q), and center frequency (ωc) can be estimated within 3.6%, 4.7%, and 3.8% error respectively, over load inductance of 4.7-10.3µH, and filter capacitance of 200- 400nF.



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  • Date: 27 Oct 2022
  • Time: 11:00 AM to 12:00 PM
  • All times are (GMT-08:00) US/Pacific
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  Speakers

Dr. Bertan Bakkaloglu of Arizona State University

Topic:

Disturbance-Free BIST Techniques for Loop Characterization of DC-DC Converters and LDOs

Biography:

Bertan Bakkaloglu (M’94, S’08, F’17) received his PhD from Oregon State University in 1995. He joined Texas Instruments Inc. Mixed Signal Wireless Design Group, Dallas, TX working on analog, RF and mixed signal front ends for wireless and wireline communication ICs. He worked on system-on-chip designs with integrated battery management and analog baseband functionality as a design leader. In 2004 he joined Arizona State University, Electrical Engineering Department, Tempe, AZ as an associate professor. He is currently a professor and his research interests include RF and PA supply regulators, high efficiency DC-DC power converters, linear regulators, low-noise power management circuits, biomedical and instrumentation circuits and systems, high speed data converters and built-in-self-test circuits for analog ICs. Dr. Bakkaloglu has been a technical program chair and general chair of IEEE RFIC conference and an associate editor of IEEE Transactions on Circuits and Systems and IEEE Transactions on Microwave Theory and Techniques. He is the founding member of IEEE Solid State Circuits Society Phoenix Chapter, and Microwave Theory and Techniques Society RFIC (TC-23) Subcommittee Chair. He is an IEEE Fellow and member of National Academy of Inventors.

Email:

Address:Arizona, United States