Challenges In Photonics Packaging For Next-Generation Hyperscale Networking Applications

#SiPho #lasers #optical #interconnects #power #efficiency #co-packaging

The steady increase in internet data traffic and 5G adoption is driving significant increases in interconnect bandwidth, channel speed and channel density, especially across hyperscale data centers and cloud service providers. This, in turn, is driving advances in ASIC and optical interconnect technologies, resulting in doubling of aggregate bandwidth per device roughly every two years. Silicon photonics-based optical interconnects are increasingly playing a critical role in enabling each next generation of higher bandwidth, higher density interconnects while enabling power and cost efficiency with small form factors. As the industry is developing 1.6Tb/s and beyond optical pluggable devices, significant challenges need to be overcome, especially relating to electrical and optical IC integration, large channel count optical fiber coupling, high-power laser integration, as well as managing thermal dissipation and overall cost. This talk will focus on some of these challenges associated with building next-generation high-bandwidth optical devices, including co-packaging optics with ASICs, as well as discussing possible paths for mitigating some of these challenges using innovations in advanced packaging processes and materials. Optimizing advanced packaging architectures for optical devices can help scale the next generation of optical interconnects while reducing cost per bit and power per bit metrics that are critical for adoption of these devices in volume across the hyperscale networking ecosystem.