Kurs na temat projektowania All-Digital PLL
Prof. Bogdan Staszewski opowie o projektowaniu układów All-Digital PLL w nowoczesnych technologiach mikroelektronicznych.
Abstract: The past two decades has seen proliferation of all-digital phase-locked loops (ADPLL) for RF and highperformance frequency synthesis due to their clear benefits of flexibility, reconfigurability, transfer function precision, settling speed, frequency modulation capability, and amenability to integration withdigital baseband and application processors. When implemented in nanoscale CMOS, the ADPLL also exhibits advantages of better performance, lower power consumption, lower area and cost over the traditional analog-intensive charge-pump PLL. In a typical ADPLL, a traditional VCO got directly replaced by a digitally controlled oscillator (DCO) for generating an output variable clock, a traditional phase/frequency detector and a charge pump got replaced by a time-to-digital converter (TDC) for detecting phase departures of the variable clock versus the frequency reference (FREF) clock, and an analog loop RC filter got replaced with a digital loop filter. The conversion gains of the DCO and TDC circuits are readily estimated and compensated using “free” but powerful digital logic.
Robert Bogdan Staszewski received the BSc (summa cum laude), MSc and PhD degrees from the University of Texas at Dallas in 1991, 1992 and 2002, respectively. From 1991 to 1995 he was with Alcatel Network Systems in Richardson, TX, USA, working on SONET cross-connect systems for fiber optics communications. He joined Texas Instruments in Dallas, TX, USA, in 1995 where he was elected Distinguished Member of Technical Staff (2% of the technical population). Between 1995 and 1999, he was engaged in advanced CMOS read channel development for hard disk drives. In 1999 he co-started a Digital RF Processor (DRP) group within Texas Instruments with a mission to invent new digitally intensive approaches to traditional RF functions for integrated radios in deep-submicron CMOS. He served as a CTO of the DRP group between 2007 and 2009. In 2009, he joined Delft University of Technology in the Netherlands where he is currently a guest Full Professor. Since 2014, he has been a Full Professor with University College Dublin in Ireland. He has authored and co-authored seven books, 11 book chapters, 160 journal and 220 conference publications, and holds 220 issued US patents. His research interests include nanoscale CMOS architectures and circuits for frequency synthesizers, transmitters and receivers, as well as quantum computers. He is an IEEE Fellow and recipient of IEEE Circuits and Systems Industrial Pioneer Award.
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- Start time: 27 Oct 2022 03:30 PM
- End time: 28 Oct 2022 07:00 PM
- All times are (UTC+02:00) Warsaw
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- Co-sponsored by Silicon Creations